[S] Change in coreboot[master]: soc/mediatek/common: Reset the watchdog timer before triggering reset

[Kuan-Hsun Cheng (Code Review)]

Attention is currently required from: Hung-Te Lin, Kuan-Hsun Cheng.

Hello Hung-Te Lin, build bot (Jenkins), Paul Menzel, Rex-BC Chen, Yidi Lin, Yu-Ping Wu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/71754

to look at the new patch set (#6).

Change subject: soc/mediatek/common: Reset the watchdog timer before triggering reset
......................................................................

soc/mediatek/common: Reset the watchdog timer before triggering reset

When the watchdog timer reaches 0, the timer value won't reset to the
default value unless there is an external reset or a kick. It will
result in the watchdog failing to trigger the reset signal.

We kick the watchdog to reset the timer to the default value. Also,
because WDT hardware needs about 94us to synchronize the registers,
add a 100us delay before triggering the reset signal.

BUG=b:264003005, b:264017048
BRANCH=corsola
TEST= Reboot successfully with the following cmd
      stop daisydog
      sleep 60 > /dev/watchdog&

Signed-off-by: Runyang Chen 
Signed-off-by: Kuan-Hsun Cheng 
Change-Id: Ic4964103d54910c4a1e675b59c362e93c2213b19
---
M src/soc/mediatek/common/include/soc/wdt_common.h
M src/soc/mediatek/common/wdt.c
2 files changed, 33 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/54/71754/6