[M] Change in coreboot[master]: drivers/intel/fsp2_0: Update MRC cache in ramstage

[Julius Werner (Code Review)]

Attention is currently required from: Kangheui Won, Reka Norman, Tim Wawrzynczak, Paul Menzel, Angel Pons, Sridhar Siricilla, Arthur Heymans, Eric Lai, Ronak Kanabar, Andrey Petrov.

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67669 )

Change subject: drivers/intel/fsp2_0: Update MRC cache in ramstage
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Patch Set 2: Code-Review+2

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/67669/comment/6ca6caf8_20880949 
PS1, Line 18:
> This won't work since FSP_INFO_HOB is not available on every FSP 2 platform. […]

Well, it seems really excessive but I can't come up with a better solution either. I assume there's no easy way to turn it around either and extract one of the versions that are available in the HOBs in romstage before running it (so we could just start using that one for the MRC driver instead)?