Change in coreboot[master]: [TEST]src/drivers/intel/fsp2_0: Change fsp_is_multi_phase_init_enable...

Ronak Kanabar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61527 ) Change subject: [TEST]src/drivers/intel/fsp2_0: Change fsp_is_multi_phase_init_enabled check ...................................................................... [TEST]src/drivers/intel/fsp2_0: Change fsp_is_multi_phase_init_enabled check Add check of USE_INTEL_FSP_MP_INIT config in fsp_is_multi_phase_init_enabled Change-Id: I35ba5a3f0540c18652e5ad2c25e11258477e53b6 Signed-off-by: Ronak Kanabar <ronak.kanabar@intel.com> --- M src/drivers/intel/fsp2_0/silicon_init.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/61527/1 diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index 83d44b1..cc7a98a 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -75,7 +75,8 @@ bool fsp_is_multi_phase_init_enabled(void) { return CONFIG(FSPS_USE_MULTI_PHASE_INIT) && - (fsps_hdr.multi_phase_si_init_entry_offset != 0); + (fsps_hdr.multi_phase_si_init_entry_offset != 0) && + (!CONFIG(USE_INTEL_FSP_MP_INIT)); } static void fsp_fill_common_arch_params(FSPS_UPD *supd) -- To view, visit https://review.coreboot.org/c/coreboot/+/61527 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I35ba5a3f0540c18652e5ad2c25e11258477e53b6 Gerrit-Change-Number: 61527 Gerrit-PatchSet: 1 Gerrit-Owner: Ronak Kanabar <ronak.kanabar@intel.com> Gerrit-MessageType: newchange
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Ronak Kanabar (Code Review)