[XS] Change in coreboot[master]: soc/intel/common: Restore to page 0 before reading SPD

[Matt DeVillier (Code Review)]

Attention is currently required from: CoolStar, Kyösti Mälkki, Sean Rhodes, Tim Crawford.

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/76382?usp=email )

Change subject: soc/intel/common: Restore to page 0 before reading SPD
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Patch Set 3:

(1 comment)

File src/soc/intel/common/block/smbus/smbuslib.c:

https://review.coreboot.org/c/coreboot/+/76382/comment/aef5c5d9_79dfffdc :
PS3, Line 44: 	smbus_write_byte(SPD_PAGE_0, 0, 0);
> This part of the conditional should not evaluate true with DDR3 or older DIMMs: […]

since we can't know the DRAM type ahead of time, how about only restoring to page 0 in the event the read fails (==0) and then retrying the read? If we've already failed once, the timeout is less of an issue since we're likely failing to boot anyway