[S] Change in coreboot[main]: mb/google/brya/var/trulo: Update PL1 values as per silicon TDP

[Paul Menzel (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, V Sowmya, Vidya Gopalakrishnan, Vinay Kumar.

Paul Menzel has posted comments on this change by Vidya Gopalakrishnan. ( https://review.coreboot.org/c/coreboot/+/85184?usp=email )

Change subject: mb/google/brya/var/trulo: Update PL1 values as per silicon TDP
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Patch Set 4:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/85184/comment/1194ba2e_92806a57?usp... :
PS4, Line 7: Update
Decrease

https://review.coreboot.org/c/coreboot/+/85184/comment/4cf407d7_6844c3b5?usp... :
PS4, Line 9: Update the RAPL PL1 limit and MMIO PL1 max values as per silicon TDP.
Please mention the values.

https://review.coreboot.org/c/coreboot/+/85184/comment/ce6c5d73_047fb7ea?usp... :
PS4, Line 13: Verified PL1 value is updated in DTT and sysfs interfaces.
Please paste the commands and the output.