Change in coreboot[master]: soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDs

[EricR Lai (Code Review)]

Attention is currently required from: Tim Crawford, Cliff Huang, Subrata Banik, Maulik V Vaghela, Tim Wawrzynczak, Patrick Rudolph.
EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60182 )

Change subject: soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDs
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Patch Set 4:

(1 comment)

Patchset:

PS4: 
Interesting, I did in romstage, FSP-S need do it again?

/* Configure CPU PCIE ports */
    m_cfg->CpuPcieRpEnableMask = pcie_rp_enable_mask(get_cpu_pcie_rp_table());
    pcie_rp_init(m_cfg, m_cfg->CpuPcieRpEnableMask, PCIE_RP_CPU, config->cpu_pcie_rp,
    		CONFIG_MAX_CPU_ROOT_PORTS);