[S] Change in coreboot[main]: soc/intel/mtl: Hook up GMA ACPI brightness controls
Tim Crawford has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82729?usp=email ) Change subject: soc/intel/mtl: Hook up GMA ACPI brightness controls ...................................................................... soc/intel/mtl: Hook up GMA ACPI brightness controls Add function needed to generate ACPI backlight control SSDT, along with Kconfig values for accessing the registers. Change-Id: Ied08e5e9fe4913bd60474ed7dcf88b945172558d Signed-off-by: Jeremy Soller <jeremy@sysetm76.com> Signed-off-by: Tim Crawford <tcrawford@system76.com> --- M src/soc/intel/meteorlake/Kconfig M src/soc/intel/meteorlake/Makefile.mk M src/soc/intel/meteorlake/chip.h A src/soc/intel/meteorlake/graphics.c 4 files changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/82729/1 diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig index 622d35f..31aee89 100644 --- a/src/soc/intel/meteorlake/Kconfig +++ b/src/soc/intel/meteorlake/Kconfig @@ -402,6 +402,18 @@ help Set this option if debug build of FSP is used. +config INTEL_GMA_BCLV_OFFSET + default 0xc8258 + +config INTEL_GMA_BCLV_WIDTH + default 32 + +config INTEL_GMA_BCLM_OFFSET + default 0xc8254 + +config INTEL_GMA_BCLM_WIDTH + default 32 + config DROP_CPU_FEATURE_PROGRAM_IN_FSP bool default y if MP_SERVICES_PPI_V2_NOOP || CHROMEOS diff --git a/src/soc/intel/meteorlake/Makefile.mk b/src/soc/intel/meteorlake/Makefile.mk index 893523c..113bba4 100644 --- a/src/soc/intel/meteorlake/Makefile.mk +++ b/src/soc/intel/meteorlake/Makefile.mk @@ -37,6 +37,7 @@ ramstage-y += espi.c ramstage-y += finalize.c ramstage-y += fsp_params.c +ramstage-y += graphics.c ramstage-y += lockdown.c ramstage-y += p2sb.c ramstage-y += pcie_rp.c diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h index 0c76b7c..0cee962 100644 --- a/src/soc/intel/meteorlake/chip.h +++ b/src/soc/intel/meteorlake/chip.h @@ -4,6 +4,7 @@ #define _SOC_CHIP_H_ #include <drivers/i2c/designware/dw_i2c.h> +#include <drivers/intel/gma/gma.h> #include <device/pci_ids.h> #include <gpio.h> #include <intelblocks/cfg.h> @@ -527,6 +528,9 @@ * as per `enum slew_rate` data type. */ uint8_t slow_slew_rate_config[NUM_VR_DOMAINS]; + + /* i915 struct for GMA backlight control */ + struct i915_gpu_controller_info gfx; }; typedef struct soc_intel_meteorlake_config config_t; diff --git a/src/soc/intel/meteorlake/graphics.c b/src/soc/intel/meteorlake/graphics.c new file mode 100644 index 0000000..0ce4442 --- /dev/null +++ b/src/soc/intel/meteorlake/graphics.c @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <intelblocks/graphics.h> +#include <soc/ramstage.h> + +const struct i915_gpu_controller_info * +intel_igd_get_controller_info(const struct device *const dev) +{ + const struct soc_intel_meteorlake_config *const chip = dev->chip_info; + return &chip->gfx; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/82729?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ied08e5e9fe4913bd60474ed7dcf88b945172558d Gerrit-Change-Number: 82729 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford@system76.com>
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Tim Crawford (Code Review)