[XS] Change in coreboot[main]: mb/google/fatcat: Refactor EC_SOC_INT_ODL GPP for fatcat_ish variant

[Jayvik Desai (Code Review)]

Jayvik Desai has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85223?usp=email )

Change subject: mb/google/fatcat: Refactor EC_SOC_INT_ODL GPP for fatcat_ish variant
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mb/google/fatcat: Refactor EC_SOC_INT_ODL GPP for fatcat_ish variant

This patch refactors the configuration of GPP_E07 (EC_SOC_INT_ODL) to
accommodate the fatcat_ish variant

The GPP_E07 is not connected on google/fatcat variants using the
Microchip EC AIC.

BUG=b:370984186
TEST=Able to build fatcat/fatcat_ish w/o any error.

Change-Id: I88bd76b2110b4c0742569f1ccb2030ea516b3782
Signed-off-by: Jayvik Desai 
---
M src/mainboard/google/fatcat/variants/fatcat/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/85223/1

diff --git a/src/mainboard/google/fatcat/variants/fatcat/gpio.c b/src/mainboard/google/fatcat/variants/fatcat/gpio.c
index 14d38a9..45cede6 100644
--- a/src/mainboard/google/fatcat/variants/fatcat/gpio.c
+++ b/src/mainboard/google/fatcat/variants/fatcat/gpio.c
@@ -210,7 +210,7 @@
    PAD_CFG_GPO(GPP_E03, 1, PLTRST),
    /* GPP_E06:     SECURE_CAM_SW */
    PAD_CFG_GPI_TRIG_OWN(GPP_E06, NONE, PLTRST, LEVEL, ACPI),
-#if CONFIG(BOARD_GOOGLE_FATCAT)
+#if CONFIG(BOARD_GOOGLE_FATCAT) || CONFIG(BOARD_GOOGLE_FATCATISH)
    /* GPP_E07:     Not used */
    PAD_NC(GPP_E07, NONE),
 #else