Change in coreboot[master]: mb/intel/adlrvp_m: Disable unused TBT ports from device tree

[Werner Zeh (Code Review)]

Werner Zeh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/54885 )

Change subject: mb/intel/adlrvp_m: Disable unused TBT ports from device tree
......................................................................

mb/intel/adlrvp_m: Disable unused TBT ports from device tree

These PCIe and DMA ports are not available for adlrvp_m.

BUG=none
TEST=Boot device

Signed-off-by: Bernardo Perez Priego 
Change-Id: Ic568c692fbb82fb3fc70c0cafc2328f8fa2cd74d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54885
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
---
M src/mainboard/intel/adlrvp/devicetree_m.cb
1 file changed, 3 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/mainboard/intel/adlrvp/devicetree_m.cb b/src/mainboard/intel/adlrvp/devicetree_m.cb
index 51d97bc..9c66bd7 100644
--- a/src/mainboard/intel/adlrvp/devicetree_m.cb
+++ b/src/mainboard/intel/adlrvp/devicetree_m.cb
@@ -158,15 +158,15 @@
    	device pci 06.2 on  end # PEG62
    	device pci 07.0 on  end # TBT_PCIe0
    	device pci 07.1 on  end # TBT_PCIe1
-		device pci 07.2 on  end # TBT_PCIe2
-		device pci 07.3 on  end # TBT_PCIe3
+		device pci 07.2 off end # TBT_PCIe2
+		device pci 07.3 off end # TBT_PCIe3
    	device pci 08.0 off end # GNA
    	device pci 09.0 off end # NPK
    	device pci 0a.0 off end # Crash-log SRAM
    	device pci 0d.0 on  end # USB xHCI
    	device pci 0d.1 off end # USB xDCI (OTG)
    	device pci 0d.2 on  end # TBT DMA0
-		device pci 0d.3 on  end # TBT DMA1
+		device pci 0d.3 off end # TBT DMA1
    	device pci 0e.0 off end # VMD
    	device pci 10.0 off end
    	device pci 10.1 off end