Change in coreboot[master]: soc/amd/stoneyridge: Define CONSOLE_UART_BASE_ADDRESS

[Arthur Heymans (Code Review)]

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/23065

Change subject: soc/amd/stoneyridge: Define CONSOLE_UART_BASE_ADDRESS
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soc/amd/stoneyridge: Define CONSOLE_UART_BASE_ADDRESS

The build system for the SeaBIOS payload needs this when
DRIVERS_UART_8250MEM is set. Set it to the first uart controller,
which the coreboot code also seems to do.

Change-Id: I962f750f89e0352082e0b7415ceaa9bd350fdf0b
Signed-off-by: Arthur Heymans 
---
M src/soc/amd/stoneyridge/Kconfig
1 file changed, 6 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/23065/1

diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
index 58b940d..ae8360a 100644
--- a/src/soc/amd/stoneyridge/Kconfig
+++ b/src/soc/amd/stoneyridge/Kconfig
@@ -283,6 +283,12 @@
      to FEDC_6FFFh. UART controller 1 registers
      range from FEDC_8000h to FEDC_8FFFh.

+config CONSOLE_UART_BASE_ADDRESS
+	depends on CONSOLE_SERIAL
+	hex
+	default 0xfedc6000
+
+
 config SMM_TSEG_SIZE
    hex
    default 0x800000 if SMM_TSEG && HAVE_SMI_HANDLER