Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/76093?usp=email )
Change subject: drivers/spi_flash: Always exit 4-byte address mode when memory-mapped ......................................................................
drivers/spi_flash: Always exit 4-byte address mode when memory-mapped
Always send the Exit 4-Byte Address Mode (E9h) command before the first access to the SPI flash in all stages when the SPI flash is memory-mapped. This is useful for x86 mainboards that do not access SPI flash in bootblock yet still need to exit 4-byte addressing mode in romstage or ramstage.
Signed-off-by: Fred Reitberger reitbergerfred@gmail.com Change-Id: I3a62bfa44a0a5645c1bb80b32d0b9f92075c66bf Reviewed-on: https://review.coreboot.org/c/coreboot/+/76093 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Julius Werner jwerner@chromium.org --- M src/drivers/spi/spi_flash.c 1 file changed, 6 insertions(+), 1 deletion(-)
Approvals: Julius Werner: Looks good to me, approved build bot (Jenkins): Verified
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c index 5182684..7619f64 100644 --- a/src/drivers/spi/spi_flash.c +++ b/src/drivers/spi/spi_flash.c @@ -18,6 +18,9 @@ #define ADDR_MOD 0 #endif
+#define SPI_FLASH_EXIT_4BYTE_STAGE \ + (ENV_INITIAL_STAGE || CONFIG(BOOT_DEVICE_MEMORY_MAPPED)) + static void spi_flash_addr(u32 addr, u8 *cmd) { /* cmd[0] is actual command */ @@ -548,8 +551,10 @@ CONFIG_ROM_SIZE); }
- if (CONFIG(SPI_FLASH_EXIT_4_BYTE_ADDR_MODE) && ENV_INITIAL_STAGE) + if (CONFIG(SPI_FLASH_EXIT_4_BYTE_ADDR_MODE) && SPI_FLASH_EXIT_4BYTE_STAGE) { + printk(BIOS_DEBUG, "SF: Exiting 4-byte addressing mode\n"); spi_flash_cmd(&flash->spi, CMD_EXIT_4BYTE_ADDR_MODE, NULL, 0); + }
return 0; }