Change in coreboot[master]: mb/google/zork/var/shuboz: Decrease I2C3 CLK below 400 kHz

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/51052 )

Change subject: mb/google/zork/var/shuboz: Decrease I2C3 CLK below 400 kHz
......................................................................

mb/google/zork/var/shuboz: Decrease I2C3 CLK below 400 kHz

Modify I2C3 setting to follow I2C specification (lower than 400kHz).
Original setting:
.rise_time_ns = 184
.fall_time_ns = 42

Change to:
.rise_time_ns = 110
.fall_time_ns = 34

BUG=b:181091107
BRANCH=zork
TEST=emerge-zork coreboot chromeos-bootimage

Signed-off-by: Kane Chen 
Change-Id: Ibdbb9a7dde524bdbde4789ee7ea005646080d97a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51052
Tested-by: build bot (Jenkins) 
Reviewed-by: Kangheui Won 
Reviewed-by: Paul Menzel 
---
M src/mainboard/google/zork/variants/shuboz/overridetree.cb
1 file changed, 2 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Kane Chen: Looks good to me, but someone else must approve
  Kangheui Won: Looks good to me, approved

diff --git a/src/mainboard/google/zork/variants/shuboz/overridetree.cb b/src/mainboard/google/zork/variants/shuboz/overridetree.cb
index 436f0ed..16c18b5 100644
--- a/src/mainboard/google/zork/variants/shuboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/shuboz/overridetree.cb
@@ -35,8 +35,8 @@

register "i2c[3]" = "{
    	.speed = I2C_SPEED_FAST,
-		.rise_time_ns = 184, /* 0 to 1.26v (1.8 * .7) */
-		.fall_time_ns = 42,  /* 1.26v to 0 */
+		.rise_time_ns = 110, /* 0 to 1.26v (1.8 * .7) */
+		.fall_time_ns = 34,  /* 1.26v to 0 */
    	.early_init = true,
    }"