New patch to review for coreboot: ab8be71 cpu/allwinner/a10: Clear the usage of SRAM during the bootblock

[Alexandru Gagniuc]

Alexandru Gagniuc ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4563

-gerrit

commit ab8be711a019cf2f329143551c7b87e35a1b2547
Author: Alexandru Gagniuc 
Date:   Sun Dec 22 18:51:29 2013 -0500

cpu/allwinner/a10: Clear the usage of SRAM during the bootblock

We have 32KiB of usable SRAM right when we boot. The first 24KiB can
    be loaded with our bootblock, while the other 8KiB can be used as
    stack during the bootblock stage.

Signed-off-by: Alexandru Gagniuc 
    Change-Id: I48d3a37869031c3c1dbc1fab71204d473d64deeb
---
 src/cpu/allwinner/a10/Kconfig      | 10 +++++++---
 src/cpu/allwinner/a10/Makefile.inc | 15 ++++++++-------
 2 files changed, 15 insertions(+), 10 deletions(-)

diff --git a/src/cpu/allwinner/a10/Kconfig b/src/cpu/allwinner/a10/Kconfig
index 646fe80..f40fa26 100644
--- a/src/cpu/allwinner/a10/Kconfig
+++ b/src/cpu/allwinner/a10/Kconfig
@@ -30,18 +30,22 @@ config ROMSTAGE_BASE
    hex
    default SYS_SDRAM_BASE

-# Keep the stack in SRAM
+# Keep the stack in SRAM block A2.
+# SRAM blocks A1 (0-16KiB) and A2 (16KiB-32KiB) are always accessible to the
+# CPU. This gives us 32KiB of SRAM to boot with. The BROM bootloader will use up
+# to 24KiB to load our bootblock, which leaves us the area from 24KiB to 32 KiB
+# to use however we see fit.
 config STACK_TOP
    hex
    default 0x00008000

config STACK_BOTTOM
    hex
-	default 0x00004000
+	default 0x00006000

config STACK_SIZE
    hex
-	default 0x00004000
+	default 0x00002000

## TODO Change this to some better address not overlapping bootblock when
 ## cbfstool supports creating header in arbitrary location.
diff --git a/src/cpu/allwinner/a10/Makefile.inc b/src/cpu/allwinner/a10/Makefile.inc
index 48f3110..9f7208a 100644
--- a/src/cpu/allwinner/a10/Makefile.inc
+++ b/src/cpu/allwinner/a10/Makefile.inc
@@ -21,15 +21,16 @@ get_bootblock_size= \
    				sed 's/[^0-9 ]//g')) \
    $(shell echo $$(($(word 2, $(strip $(bb_s))))))

-# The boot ROM in the SoC will start loading code if a special boot0 header is
+# The boot ROM in the SoC will start loading code if a special BOOT0 header is
 # found (at an offset of 8KiB in either NAND or SD), and the checksum is
-# correct. this header is normally added by the 'mxsunxiboot' tool. The file
-# passed to mksunxiboot should only include the bootblock due to size
-# limitations.
-# FIXME: Figure out how to safely integrate in coreboot.rom. For now, only copy
-# the first 15 KiB of coreboot.rom (This will not collide with stack)
+# correct. This header is normally added by the 'mxsunxiboot' tool. The boot ROM
+# will load at most 24KiB of data to SRAM, so limit the file size accordingly.
+# The BOOT0 header takes 32 bytes, so limit our file to 24KiB - 32 bytes.
+# FIXME: Figure out how to safely integrate in coreboot.rom.
+# FIXME: The file passed to mksunxiboot should only include the bootblock due
+#	 to size limitations.
 $(obj)/BOOT0: $(obj)/coreboot.rom
    @printf "    BOOT0      $(subst $(obj)/,,$(^))\n"
    touch $@
-	dd if=$^ of=$^.tmp bs=1024 count=15
+	dd if=$^ of=$^.tmp bs=24544 count=1
    -mksunxiboot $^.tmp $@