[M] Change in coreboot[main]: device/pciexp_device.c: Fix setting Max Payload Size

[Michał Żygowski (Code Review)]

Attention is currently required from: Angel Pons, Arthur Heymans, Felix Held, Krystian Hebel, Kyösti Mälkki, Nico Huber, Patrick Rudolph.

Hello Angel Pons, Arthur Heymans, Felix Held, Kyösti Mälkki, Nico Huber, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/77338?usp=email

to look at the new patch set (#11).

The following approvals got outdated and were removed:
Code-Review+2 by Kyösti Mälkki, Verified+1 by build bot (Jenkins)

Change subject: device/pciexp_device.c: Fix setting Max Payload Size
......................................................................

device/pciexp_device.c: Fix setting Max Payload Size

Current implementation assumes that the endpoint device is connected
directly to the PCIe Root Port, which does not always have to be true.
In a case where there is a PCIe switch between the endpoint and the
Root Port the Max Payload Size capability may differ across these
devices and coreboot will not set a correct Max Payload size. This
results in PCIe device malfunction in pre-OS environment, e.g. if
the Ethernet NICs are connected behind a PCIe switch, iPXE fails to
obtain the DHCP configuration.

Fix this by traversing the topology and programming the highest common
Max Payload Size in the given PCIe device chain.

TEST=Perform successful dhcp command in iPXE on the NIC connected to
the PCIe Root Port via ASMedia ASM1806 PCIe Switch and a NIC connected
directly to the PCIe Root Port.

Change-Id: I24386dc208363b7d94fea46dec25c231a3968225
Signed-off-by: Michał Żygowski 
---
M src/device/pciexp_device.c
M src/include/device/device.h
2 files changed, 62 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/77338/11