Xi Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47231 )
Change subject: soc/mediatek/mt8192: Add 4266Mbps flag for dpm ......................................................................
soc/mediatek/mt8192: Add 4266Mbps flag for dpm
Dpm needs the max supported freq(4266Mbps) flag for low power.
Signed-off-by: Xi Chen xixi.chen@mediatek.com Change-Id: I02edc70d3bd8cf7b932069ca05aaff4590af1818 --- M src/soc/mediatek/mt8192/dramc_pi_basic_api.c M src/soc/mediatek/mt8192/dramc_tracking.c M src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h M src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h 4 files changed, 18 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/47231/1
diff --git a/src/soc/mediatek/mt8192/dramc_pi_basic_api.c b/src/soc/mediatek/mt8192/dramc_pi_basic_api.c old mode 100644 new mode 100755 index a098cf2..a72883d --- a/src/soc/mediatek/mt8192/dramc_pi_basic_api.c +++ b/src/soc/mediatek/mt8192/dramc_pi_basic_api.c @@ -25,11 +25,22 @@ u8 value = ((cali->emi_config->cona_val >> 17) & 0x1) ? 0 : 1;
SET32_BITFIELDS(&ch[0].ao.sa_reserve, - SA_RESERVE_MODE_RK0, cali->cbt_mode[RANK_0], - SA_RESERVE_MODE_RK1, cali->cbt_mode[RANK_1], SA_RESERVE_SINGLE_RANK, value); }
+void set_dram_info_to_conf(const struct ddr_cali *cali) +{ + for (u8 chn = 0; chn < CHANNEL_MAX; chn++) { + SET32_BITFIELDS(&ch[chn].ao.sa_reserve, + SA_RESERVE_MODE_RK0, cali->cbt_mode[RANK_0], + SA_RESERVE_MODE_RK1, cali->cbt_mode[RANK_1]); + + if (get_highest_freq_group() >= DDRFREQ_2133) + SET32_BITFIELDS(&ch[chn].ao.sa_reserve, + SA_RESERVE_SUPPORT_4266, 1); + } +} + static void get_dram_pinmux_sel(struct ddr_cali *cali) { u32 value = (read32(&mtk_gpio->dram_pinmux_trapping) >> 19) & 0x1; diff --git a/src/soc/mediatek/mt8192/dramc_tracking.c b/src/soc/mediatek/mt8192/dramc_tracking.c index 382675e..4f4c517 100755 --- a/src/soc/mediatek/mt8192/dramc_tracking.c +++ b/src/soc/mediatek/mt8192/dramc_tracking.c @@ -764,6 +764,8 @@
void dramc_runtime_config(const struct ddr_cali *cali) { + set_dram_info_to_conf(cali); + dpm_control_init(cali);
for (u8 chn = 0; chn < CHANNEL_MAX; chn++) diff --git a/src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h b/src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h old mode 100644 new mode 100755 index a223711..782f644 --- a/src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h +++ b/src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h @@ -341,4 +341,6 @@ u8 get_cbt_vref_pinmux_value(const struct ddr_cali *cali, u8 range, u8 vref_lev); void o1_path_on_off(const struct ddr_cali *cali, o1_state o1);
+void set_dram_info_to_conf(const struct ddr_cali *cali); + #endif /* __SOC_MEDIATEK_MT8192_DRAMC_PI_API_H__ */ diff --git a/src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h b/src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h old mode 100644 new mode 100755 index 82ae8b5..a5ab7c2 --- a/src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h +++ b/src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h @@ -2500,6 +2500,7 @@
/* DRAMC_REG_SA_RESERVE */ DEFINE_BIT(SA_RESERVE_SINGLE_RANK, 0) +DEFINE_BIT(SA_RESERVE_SUPPORT_4266, 3) DEFINE_BITFIELD(SA_RESERVE_MODE_RK1, 27, 24) DEFINE_BITFIELD(SA_RESERVE_MODE_RK0, 31, 28)
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47231 )
Change subject: soc/mediatek/mt8192: Add 4266Mbps flag for dpm ......................................................................
Patch Set 1:
(7 comments)
https://review.coreboot.org/c/coreboot/+/47231/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/47231/1//COMMIT_MSG@7 PS1, Line 7: dpm What does dpm mean?
https://review.coreboot.org/c/coreboot/+/47231/1/src/soc/mediatek/mt8192/dra... File src/soc/mediatek/mt8192/dramc_pi_basic_api.c:
PS1: Please remove execute permission.
https://review.coreboot.org/c/coreboot/+/47231/1/src/soc/mediatek/mt8192/dra... PS1, Line 35: SA_RESERVE_MODE_RK0 Align with &ch[chn]
https://review.coreboot.org/c/coreboot/+/47231/1/src/soc/mediatek/mt8192/dra... PS1, Line 40: SA_RESERVE_SUPPORT_4266 Align with &ch[chn]
https://review.coreboot.org/c/coreboot/+/47231/1/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h:
PS1: Please remove execute permission.
https://review.coreboot.org/c/coreboot/+/47231/1/src/soc/mediatek/mt8192/inc... PS1, Line 343: Remove the blank line unless there's a logical difference between the 2 groups.
https://review.coreboot.org/c/coreboot/+/47231/1/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h:
PS1: Please remove execute permission.
Hello build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47231
to look at the new patch set (#2).
Change subject: soc/mediatek/mt8192: Add 4266Mbps flag for dpm ......................................................................
soc/mediatek/mt8192: Add 4266Mbps flag for dpm
Dpm needs the max supported freq(4266Mbps) flag for low power.
Signed-off-by: Xi Chen xixi.chen@mediatek.com Change-Id: I02edc70d3bd8cf7b932069ca05aaff4590af1818 --- M src/soc/mediatek/mt8192/dramc_pi_basic_api.c M src/soc/mediatek/mt8192/dramc_tracking.c M src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h M src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h 4 files changed, 18 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/47231/2
Yidi Lin has uploaded a new patch set (#7) to the change originally created by Xi Chen. ( https://review.coreboot.org/c/coreboot/+/47231 )
Change subject: soc/mediatek/mt8192: Add 4266Mbps flag for dpm ......................................................................
soc/mediatek/mt8192: Add 4266Mbps flag for dpm
Dpm needs the max supported freq(4266Mbps) flag for low power.
Signed-off-by: Xi Chen xixi.chen@mediatek.com Change-Id: I02edc70d3bd8cf7b932069ca05aaff4590af1818 --- M src/soc/mediatek/mt8192/dramc_pi_basic_api.c M src/soc/mediatek/mt8192/dramc_tracking.c M src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h M src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h 4 files changed, 18 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/47231/7
Yidi Lin has uploaded a new patch set (#17) to the change originally created by Xi Chen. ( https://review.coreboot.org/c/coreboot/+/47231 )
Change subject: soc/mediatek/mt8192: Add 4266Mbps flag for dpm ......................................................................
soc/mediatek/mt8192: Add 4266Mbps flag for dpm
Dpm needs the max supported freq(4266Mbps) flag for low power.
Signed-off-by: Xi Chen xixi.chen@mediatek.com Change-Id: I02edc70d3bd8cf7b932069ca05aaff4590af1818 --- M src/soc/mediatek/mt8192/dramc_pi_basic_api.c M src/soc/mediatek/mt8192/dramc_tracking.c M src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h M src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h 4 files changed, 18 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/47231/17
Yidi Lin has uploaded a new patch set (#19) to the change originally created by Xi Chen. ( https://review.coreboot.org/c/coreboot/+/47231 )
Change subject: soc/mediatek/mt8192: Add 4266Mbps flag for dpm ......................................................................
soc/mediatek/mt8192: Add 4266Mbps flag for dpm
Dpm needs the max supported freq(4266Mbps) flag for low power.
Signed-off-by: Xi Chen xixi.chen@mediatek.com Change-Id: I02edc70d3bd8cf7b932069ca05aaff4590af1818 --- M src/soc/mediatek/mt8192/dramc_pi_basic_api.c M src/soc/mediatek/mt8192/dramc_tracking.c M src/soc/mediatek/mt8192/include/soc/dramc_pi_api.h M src/soc/mediatek/mt8192/include/soc/dramc_register_bits_def.h 4 files changed, 18 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/47231/19
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47231 )
Change subject: soc/mediatek/mt8192: Add 4266Mbps flag for dpm ......................................................................
Patch Set 23:
(3 comments)
https://review.coreboot.org/c/coreboot/+/47231/23//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/47231/23//COMMIT_MSG@9 PS23, Line 9: freq(4266Mbps) Please add a space before the (.
https://review.coreboot.org/c/coreboot/+/47231/23//COMMIT_MSG@10 PS23, Line 10: Tested how? What is the power usage without and with this change?
https://review.coreboot.org/c/coreboot/+/47231/23/src/soc/mediatek/mt8192/dr... File src/soc/mediatek/mt8192/dramc_pi_basic_api.c:
https://review.coreboot.org/c/coreboot/+/47231/23/src/soc/mediatek/mt8192/dr... PS23, Line 40: SA_RESERVE_SUPPORT_4266, 1); Should fit on the line above.
Xi Chen has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/47231 )
Change subject: soc/mediatek/mt8192: Add 4266Mbps flag for dpm ......................................................................
Abandoned
-
Paul Menzel (Code Review) -
Xi Chen (Code Review)
-
Yidi Lin (Code Review)
-
Yu-Ping Wu (Code Review)