Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/22805
Change subject: sb/intel/i82801gx: Use common ACPI PIRQ function ......................................................................
sb/intel/i82801gx: Use common ACPI PIRQ function
Not yet tested.
Change-Id: I456dca61419be9f2efd06fa966343a4b5ad6d5c6 Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- D src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl M src/mainboard/apple/macbook21/romstage.c M src/mainboard/asrock/g41c-gs/romstage.c D src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl D src/mainboard/foxconn/g41s-k/acpi/x4x_pci_irqs.asl M src/mainboard/foxconn/g41s-k/romstage.c D src/mainboard/getac/p470/acpi/i945_pci_irqs.asl M src/mainboard/getac/p470/romstage.c D src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl D src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl M src/mainboard/gigabyte/ga-g41m-es2l/romstage.c D src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl M src/mainboard/ibase/mb899/romstage.c D src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl M src/mainboard/intel/d510mo/romstage.c D src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl M src/mainboard/intel/d945gclf/romstage.c D src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl M src/mainboard/kontron/986lcd-m/romstage.c D src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl M src/mainboard/lenovo/t60/romstage.c D src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl M src/mainboard/lenovo/x60/romstage.c D src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl M src/mainboard/roda/rk886ex/romstage.c M src/northbridge/intel/i945/acpi/hostbridge.asl M src/northbridge/intel/pineview/acpi/hostbridge.asl M src/southbridge/intel/i82801gx/Kconfig M src/southbridge/intel/i82801gx/lpc.c 29 files changed, 11 insertions(+), 1,040 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/22805/1
diff --git a/src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl b/src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl deleted file mode 100644 index 5e5facb..0000000 --- a/src/mainboard/apple/macbook21/acpi/i945_pci_irqs.asl +++ /dev/null @@ -1,66 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Sven Schnelle svens@stackframe.org - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for the - * i945 - */ - - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - Package() { 0x0001FFFF, 0, 0, 0x10 }, - Package() { 0x0002FFFF, 0, 0, 0x10 }, - Package() { 0x0007FFFF, 0, 0, 0x10 }, - Package() { 0x001BFFFF, 0, 0, 0x16 }, - Package() { 0x001CFFFF, 0, 0, 0x11 }, - Package() { 0x001CFFFF, 1, 0, 0x10 }, - Package() { 0x001CFFFF, 2, 0, 0x12 }, - Package() { 0x001CFFFF, 3, 0, 0x13 }, - Package() { 0x001DFFFF, 0, 0, 0x15 }, - Package() { 0x001DFFFF, 1, 0, 0x13 }, - Package() { 0x001DFFFF, 2, 0, 0x12 }, - Package() { 0x001DFFFF, 3, 0, 0x10 }, - Package() { 0x001EFFFF, 0, 0, 0x16 }, - Package() { 0x001EFFFF, 1, 0, 0x14 }, - Package() { 0x001FFFFF, 0, 0, 0x12 }, - Package() { 0x001FFFFF, 1, 0, 0x13 }, - Package() { 0x001FFFFF, 3, 0, 0x10 } - }) - } Else { - Return (Package() { - Package() { 0x0001FFFF, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x0002FFFF, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x0007FFFF, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001BFFFF, 0, _SB.PCI0.LPCB.LNKG, 0 }, - Package() { 0x001CFFFF, 0, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001CFFFF, 1, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001CFFFF, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001CFFFF, 3, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001DFFFF, 0, _SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x001DFFFF, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001DFFFF, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001DFFFF, 3, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001EFFFF, 0, _SB.PCI0.LPCB.LNKG, 0 }, - Package() { 0x001EFFFF, 1, _SB.PCI0.LPCB.LNKE, 0 }, - Package() { 0x001FFFFF, 0, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001FFFFF, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001FFFFF, 3, _SB.PCI0.LPCB.LNKA, 0 } - }) - } -} diff --git a/src/mainboard/apple/macbook21/romstage.c b/src/mainboard/apple/macbook21/romstage.c index 92dfe74..ed971ae 100644 --- a/src/mainboard/apple/macbook21/romstage.c +++ b/src/mainboard/apple/macbook21/romstage.c @@ -167,13 +167,6 @@ /* HD Audio Interrupt */ RCBA32(0x3110) = 0x00000001;
- /* dev irq route register */ - RCBA16(0x3140) = 0x0232; - RCBA16(0x3142) = 0x3246; - RCBA16(0x3144) = 0x0235; - RCBA16(0x3146) = 0x3201; - RCBA16(0x3148) = 0x3216; - /* Enable IOAPIC */ RCBA8(0x31ff) = 0x03;
diff --git a/src/mainboard/asrock/g41c-gs/romstage.c b/src/mainboard/asrock/g41c-gs/romstage.c index dd885db..8645b9c 100644 --- a/src/mainboard/asrock/g41c-gs/romstage.c +++ b/src/mainboard/asrock/g41c-gs/romstage.c @@ -53,10 +53,6 @@
nuvoton_pnp_exit_conf_state(SERIAL_DEV);
- /* IRQ routing */ - RCBA16(D31IR) = 0x0132; - RCBA16(D29IR) = 0x0237; - /* Enable IOAPIC */ RCBA8(0x31ff) = 0x03; RCBA8(0x31ff); diff --git a/src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl b/src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl deleted file mode 100644 index 4aaa33f..0000000 --- a/src/mainboard/asus/p5gc-mx/acpi/i945_pci_irqs.asl +++ /dev/null @@ -1,75 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for the - * i945 - */ - - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, 0, 16 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, 0, 16 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, 0, 16 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, 0, 16 }, - Package() { 0x001cffff, 1, 0, 17 }, - Package() { 0x001cffff, 2, 0, 18 }, - Package() { 0x001cffff, 3, 0, 19 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, 0, 16 }, - Package() { 0x001dffff, 1, 0, 17 }, - Package() { 0x001dffff, 2, 0, 18 }, - Package() { 0x001dffff, 3, 0, 19 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, 0, 16 }, - Package() { 0x001fffff, 1, 0, 17 }, - Package() { 0x001fffff, 2, 0, 18 }, - Package() { 0x001fffff, 3, 0, 19 }, - - }) - - } Else { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001cffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001dffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001dffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001dffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001fffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001fffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - }) - } -} diff --git a/src/mainboard/foxconn/g41s-k/acpi/x4x_pci_irqs.asl b/src/mainboard/foxconn/g41s-k/acpi/x4x_pci_irqs.asl deleted file mode 100644 index 8c8afcb..0000000 --- a/src/mainboard/foxconn/g41s-k/acpi/x4x_pci_irqs.asl +++ /dev/null @@ -1,79 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2017 Arthur Heymans arthur@aheymans.xyz - * Copyright (C) 2017 Samuel Holland samuel@sholland.org - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for x4x */ - -/* PCI Interrupt Routing */ -Method(_PRT) -{ - If (PICM) { - Return (Package() { - /* PEG 0:01.0 */ - Package() { 0x0001ffff, 0, 0, 0x10 }, - Package() { 0x0001ffff, 1, 0, 0x11 }, - Package() { 0x0001ffff, 2, 0, 0x12 }, - Package() { 0x0001ffff, 3, 0, 0x13 }, - /* Internal GFX 0:02.0 */ - Package() { 0x0002ffff, 0, 0, 0x10 }, - /* High Definition Audio 0:1b.0 */ - Package() { 0x001bffff, 0, 0, 0x10 }, - /* PCIe Root Ports 0:1c.x */ - Package() { 0x001cffff, 0, 0, 0x10 }, - Package() { 0x001cffff, 1, 0, 0x11 }, - Package() { 0x001cffff, 2, 0, 0x12 }, - Package() { 0x001cffff, 3, 0, 0x13 }, - /* USB and EHCI 0:1d.x */ - Package() { 0x001dffff, 0, 0, 0x17 }, - Package() { 0x001dffff, 1, 0, 0x13 }, - Package() { 0x001dffff, 2, 0, 0x12 }, - Package() { 0x001dffff, 3, 0, 0x10 }, - /* PCI Bridge 0x1e.0 */ - Package() { 0x001effff, 0, 0, 0x11 }, - Package() { 0x001effff, 1, 0, 0x14 }, - /* PATA/SATA/SMBUS 0:1f.x */ - Package() { 0x001fffff, 0, 0, 0x12 }, - Package() { 0x001fffff, 1, 0, 0x13 }, - }) - } Else { - Return (Package() { - /* PEG 0:01.0 */ - Package() { 0x0001ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x0001ffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x0001ffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x0001ffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - /* Internal GFX 0:02.0 */ - Package() { 0x0002ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - /* High Definition Audio 0:1b.0 */ - Package() { 0x001bffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - /* PCIe Root Ports 0:1c.x */ - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001cffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - /* USB and EHCI 0:1d.x */ - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x001dffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001dffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001dffff, 3, _SB.PCI0.LPCB.LNKA, 0 }, - /* PCI Bridge 0x1e.0 */ - Package() { 0x001effff, 0, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001effff, 1, _SB.PCI0.LPCB.LNKE, 0 }, - /* PATA/SATA/SMBUS 0:1f.x */ - Package() { 0x001fffff, 0, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - }) - } -} diff --git a/src/mainboard/foxconn/g41s-k/romstage.c b/src/mainboard/foxconn/g41s-k/romstage.c index 2a704a3..cfd5356 100644 --- a/src/mainboard/foxconn/g41s-k/romstage.c +++ b/src/mainboard/foxconn/g41s-k/romstage.c @@ -57,11 +57,6 @@ ite_reg_write(GPIO_DEV, 0xf6, 0x12); ite_enable_3vsbsw(GPIO_DEV);
- /* Set up IRQ routing. */ - RCBA16(D31IR) = 0x0132; - RCBA16(D30IR) = 0x3241; - RCBA16(D29IR) = 0x0237; - /* Enable IOAPIC. */ RCBA8(OIC) = 0x03; RCBA8(OIC); diff --git a/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl b/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl deleted file mode 100644 index 5bbf144..0000000 --- a/src/mainboard/getac/p470/acpi/i945_pci_irqs.asl +++ /dev/null @@ -1,82 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for the - * i945 - */ - - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, 0, 16 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, 0, 16 }, - // Network - Package() { 0x0007ffff, 0, 0, 16 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, 0, 22 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, 0, 17 }, - Package() { 0x001cffff, 1, 0, 16 }, - Package() { 0x001cffff, 2, 0, 18 }, - Package() { 0x001cffff, 3, 0, 19 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, 0, 23 }, - Package() { 0x001dffff, 1, 0, 19 }, - Package() { 0x001dffff, 2, 0, 18 }, - Package() { 0x001dffff, 3, 0, 16 }, - // AC97 0:1e.2, 0:1e.3 - Package() { 0x001effff, 0, 0, 22 }, - Package() { 0x001effff, 1, 0, 20 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, 0, 18 }, - Package() { 0x001fffff, 1, 0, 19 }, - Package() { 0x001fffff, 3, 0, 16 } - }) - } Else { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // Network 0:7.0 - Package() { 0x0007ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, _SB.PCI0.LPCB.LNKG, 0 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001cffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001cffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x001dffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001dffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001dffff, 3, _SB.PCI0.LPCB.LNKA, 0 }, - // AC97 0:1e.2, 0:1e.3 - Package() { 0x001effff, 0, _SB.PCI0.LPCB.LNKG, 0 }, - Package() { 0x001effff, 1, _SB.PCI0.LPCB.LNKE, 0 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001fffff, 3, _SB.PCI0.LPCB.LNKA, 0 } - }) - } -} diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c index d1552a6..30a890f 100644 --- a/src/mainboard/getac/p470/romstage.c +++ b/src/mainboard/getac/p470/romstage.c @@ -154,13 +154,6 @@ /* Device 1d interrupt pin register */ RCBA32(0x310c) = 0x00214321;
- /* dev irq route register */ - RCBA16(0x3140) = 0x0232; - RCBA16(0x3142) = 0x3246; - RCBA16(0x3144) = 0x0237; - RCBA16(0x3146) = 0x3201; - RCBA16(0x3148) = 0x3216; - /* Enable IOAPIC */ RCBA8(0x31ff) = 0x03;
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl deleted file mode 100644 index 4aaa33f..0000000 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi/i945_pci_irqs.asl +++ /dev/null @@ -1,75 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for the - * i945 - */ - - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, 0, 16 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, 0, 16 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, 0, 16 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, 0, 16 }, - Package() { 0x001cffff, 1, 0, 17 }, - Package() { 0x001cffff, 2, 0, 18 }, - Package() { 0x001cffff, 3, 0, 19 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, 0, 16 }, - Package() { 0x001dffff, 1, 0, 17 }, - Package() { 0x001dffff, 2, 0, 18 }, - Package() { 0x001dffff, 3, 0, 19 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, 0, 16 }, - Package() { 0x001fffff, 1, 0, 17 }, - Package() { 0x001fffff, 2, 0, 18 }, - Package() { 0x001fffff, 3, 0, 19 }, - - }) - - } Else { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001cffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001dffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001dffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001dffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001fffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001fffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - }) - } -} diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl b/src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl deleted file mode 100644 index 46e8a4a..0000000 --- a/src/mainboard/gigabyte/ga-g41m-es2l/acpi/x4x_pci_irqs.asl +++ /dev/null @@ -1,72 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2015 Damien Zammit damien@zamaudio.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for x4x */ - -/* PCI Interrupt Routing */ -Method(_PRT) -{ - If (PICM) { - Return (Package() { - /* PEG */ - Package() { 0x0001ffff, 0, 0, 16 }, - /* Internal GFX */ - Package() { 0x0002ffff, 0, 0, 16 }, - /* High Definition Audio 0:1b.0 */ - Package() { 0x001bffff, 0, 0, 16 }, - /* PCIe Root Ports 0:1c.x */ - Package() { 0x001cffff, 0, 0, 16 }, - Package() { 0x001cffff, 1, 0, 17 }, - Package() { 0x001cffff, 2, 0, 18 }, - Package() { 0x001cffff, 3, 0, 19 }, - Package() { 0x001cffff, 0, 0, 16 }, - Package() { 0x001cffff, 1, 0, 17 }, - /* USB and EHCI 0:1d.x */ - Package() { 0x001dffff, 0, 0, 23 }, - Package() { 0x001dffff, 1, 0, 19 }, - Package() { 0x001dffff, 2, 0, 18 }, - Package() { 0x001dffff, 3, 0, 16 }, - /* SMBUS/SATA/PATA 0:1f.2, 0:1f.3 */ - Package() { 0x001fffff, 0, 0, 18 }, - Package() { 0x001fffff, 1, 0, 19 }, - Package() { 0x001fffff, 1, 0, 19 }, - }) - } Else { - Return (Package() { - /* PEG */ - Package() { 0x0001ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - /* Internal GFX */ - Package() { 0x0002ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - /* High Definition Audio 0:1b.0 */ - Package() { 0x001bffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - /* PCIe Root Ports 0:1c.x */ - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001cffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - /* USB and EHCI 0:1d.x */ - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x001dffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001dffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001dffff, 3, _SB.PCI0.LPCB.LNKA, 0 }, - /* SMBUS/SATA/PATA 0:1f.2, 0:1f.3 */ - Package() { 0x001fffff, 0, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - }) - } -} diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c index 67d3eb1..e0e99af 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c @@ -94,9 +94,6 @@ RCBA32(0x3108) = 0x10004321; RCBA32(0x310c) = 0x00214321; RCBA32(0x3110) = 0x00000001; - RCBA32(0x3140) = 0x00410032; - RCBA32(0x3144) = 0x32100237; - RCBA32(0x3148) = 0x00000000;
/* Enable IOAPIC */ RCBA8(0x31ff) = 0x03; diff --git a/src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl b/src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl deleted file mode 100644 index 0db7bc7..0000000 --- a/src/mainboard/ibase/mb899/acpi/i945_pci_irqs.asl +++ /dev/null @@ -1,81 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for the - * i945 - */ - - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, 0, 16 }, - Package() { 0x0001ffff, 1, 0, 17 }, - Package() { 0x0001ffff, 2, 0, 18 }, - Package() { 0x0001ffff, 3, 0, 19 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, 0, 16 }, - // High Definition Audio 0:1b.0 - //Package() { 0x001bffff, 0, 0, 16 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, 0, 16 }, - Package() { 0x001cffff, 1, 0, 17 }, - Package() { 0x001cffff, 2, 0, 18 }, - Package() { 0x001cffff, 3, 0, 19 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, 0, 23 }, - Package() { 0x001dffff, 1, 0, 19 }, - Package() { 0x001dffff, 2, 0, 18 }, - Package() { 0x001dffff, 3, 0, 16 }, - // AC97/IDE 0:1e.2, 0:1e.3 - Package() { 0x001effff, 0, 0, 17 }, - Package() { 0x001effff, 1, 0, 20 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, 0, 18 }, - Package() { 0x001fffff, 1, 0, 19}, - }) - } Else { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x0001ffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x0001ffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x0001ffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // High Definition Audio 0:1b.0 - //Package() { 0x001bffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001cffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x001dffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001dffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001dffff, 3, _SB.PCI0.LPCB.LNKA, 0 }, - // AC97/IDE 0:1e.2, 0:1e.3 - Package() { 0x001effff, 0, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001effff, 1, _SB.PCI0.LPCB.LNKE, 0 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - }) - } -} diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c index 43c5677..838796a 100644 --- a/src/mainboard/ibase/mb899/romstage.c +++ b/src/mainboard/ibase/mb899/romstage.c @@ -135,13 +135,6 @@ /* Device 1d interrupt pin register */ RCBA32(0x310c) = 0x00214321;
- /* dev irq route register */ - RCBA16(0x3140) = 0x0132; - RCBA16(0x3142) = 0x0146; - RCBA16(0x3144) = 0x0237; - RCBA16(0x3146) = 0x3201; - RCBA16(0x3148) = 0x0146; - /* Enable IOAPIC */ RCBA8(0x31ff) = 0x03;
diff --git a/src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl b/src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl deleted file mode 100644 index 3fa6fdb..0000000 --- a/src/mainboard/intel/d510mo/acpi/pineview_pci_irqs.asl +++ /dev/null @@ -1,72 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * Copyright (C) 2015 Damien Zammit damien@zamaudio.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for pineview */ -/* FIXME: EHCI controller not working yet */ - -/* PCI Interrupt Routing */ -Method(_PRT) -{ - If (PICM) { - Return (Package() { - /* Internal GFX */ - Package() { 0x0002ffff, 0, 0, 16 }, - /* High Definition Audio 0:1b.0 */ - Package() { 0x001bffff, 0, 0, 22 }, - /* PCIe Root Ports 0:1c.x */ - Package() { 0x001cffff, 0, 0, 17 }, - Package() { 0x001cffff, 1, 0, 16 }, - Package() { 0x001cffff, 2, 0, 18 }, - Package() { 0x001cffff, 3, 0, 19 }, - /* USB and EHCI 0:1d.x */ - Package() { 0x001dffff, 0, 0, 23 }, - Package() { 0x001dffff, 1, 0, 19 }, - Package() { 0x001dffff, 2, 0, 18 }, - Package() { 0x001dffff, 3, 0, 16 }, - Package() { 0x001dffff, 0, 0, 23 }, - /* PCI 0:1e.0 */ - Package() { 0x001effff, 0, 0, 22 }, - /* LPC/SATA/SMBUS 0:1f.2, 0:1f.3 */ - Package() { 0x001fffff, 1, 0, 19 }, - Package() { 0x001fffff, 1, 0, 19 }, - Package() { 0x001fffff, 1, 0, 19 }, - }) - } Else { - Return (Package() { - /* Internal GFX */ - Package() { 0x0002ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - /* High Definition Audio 0:1b.0 */ - Package() { 0x001bffff, 0, _SB.PCI0.LPCB.LNKG, 0 }, - /* PCIe Root Ports 0:1c.x */ - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001cffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001cffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - /* USB and EHCI 0:1d.x */ - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x001dffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001dffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001dffff, 3, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKH, 0 }, - /* PCI 0:1e.0 */ - Package() { 0x001effff, 0, _SB.PCI0.LPCB.LNKG, 0 }, - /* LPC/SATA/SMBUS 0:1f.2, 0:1f.3 */ - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - }) - } -} diff --git a/src/mainboard/intel/d510mo/romstage.c b/src/mainboard/intel/d510mo/romstage.c index c6406e6..10252ae 100644 --- a/src/mainboard/intel/d510mo/romstage.c +++ b/src/mainboard/intel/d510mo/romstage.c @@ -85,13 +85,6 @@ /* HD Audio Interrupt */ RCBA32(0x3110) = 0x00000001;
- /* dev irq route register */ - RCBA16(0x3140) = 0x0132; - RCBA16(0x3142) = 0x0146; - RCBA16(0x3144) = 0x0237; - RCBA16(0x3146) = 0x3201; - RCBA16(0x3148) = 0x0146; - /* Enable IOAPIC */ RCBA8(0x31ff) = 0x03;
diff --git a/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl b/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl deleted file mode 100644 index a7fcc85..0000000 --- a/src/mainboard/intel/d945gclf/acpi/i945_pci_irqs.asl +++ /dev/null @@ -1,81 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for the - * i945 - */ - - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, 0, 16 }, - Package() { 0x0001ffff, 1, 0, 17 }, - Package() { 0x0001ffff, 2, 0, 18 }, - Package() { 0x0001ffff, 3, 0, 19 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, 0, 16 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, 0, 22 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, 0, 17 }, - Package() { 0x001cffff, 1, 0, 16 }, - Package() { 0x001cffff, 2, 0, 18 }, - Package() { 0x001cffff, 3, 0, 19 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, 0, 23 }, - Package() { 0x001dffff, 1, 0, 19 }, - Package() { 0x001dffff, 2, 0, 18 }, - Package() { 0x001dffff, 3, 0, 16 }, - // AC97 0:1e.2, 0:1e.3 - Package() { 0x001effff, 0, 0, 22 }, - Package() { 0x001effff, 1, 0, 20 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, 0, 18 }, - Package() { 0x001fffff, 1, 0, 19 }, - }) - } Else { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x0001ffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x0001ffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x0001ffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, _SB.PCI0.LPCB.LNKF, 0 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001cffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001cffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x001dffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001dffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001dffff, 3, _SB.PCI0.LPCB.LNKA, 0 }, - // AC97 0:1e.2, 0:1e.3 - Package() { 0x001effff, 0, _SB.PCI0.LPCB.LNKG, 0 }, - Package() { 0x001effff, 1, _SB.PCI0.LPCB.LNKE, 0 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - }) - } -} diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c index e769fc5..a52729b 100644 --- a/src/mainboard/intel/d945gclf/romstage.c +++ b/src/mainboard/intel/d945gclf/romstage.c @@ -60,13 +60,6 @@ /* Device 1d interrupt pin register */ RCBA32(0x310c) = 0x00214321;
- /* dev irq route register */ - RCBA16(0x3140) = 0x0132; - RCBA16(0x3142) = 0x0146; - RCBA16(0x3144) = 0x0237; - RCBA16(0x3146) = 0x3201; - RCBA16(0x3148) = 0x0146; - /* Enable IOAPIC */ RCBA8(0x31ff) = 0x03;
diff --git a/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl b/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl deleted file mode 100644 index efb94c6..0000000 --- a/src/mainboard/kontron/986lcd-m/acpi/i945_pci_irqs.asl +++ /dev/null @@ -1,81 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for the - * i945 - */ - - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, 0, 16 }, - Package() { 0x0001ffff, 1, 0, 17 }, - Package() { 0x0001ffff, 2, 0, 18 }, - Package() { 0x0001ffff, 3, 0, 19 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, 0, 16 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, 0, 16 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, 0, 16 }, - Package() { 0x001cffff, 1, 0, 17 }, - Package() { 0x001cffff, 2, 0, 18 }, - Package() { 0x001cffff, 3, 0, 19 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, 0, 23 }, - Package() { 0x001dffff, 1, 0, 19 }, - Package() { 0x001dffff, 2, 0, 18 }, - Package() { 0x001dffff, 3, 0, 16 }, - // AC97/IDE 0:1e.2, 0:1e.3 - Package() { 0x001effff, 0, 0, 17 }, - Package() { 0x001effff, 1, 0, 20 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, 0, 18 }, - Package() { 0x001fffff, 1, 0, 19}, - }) - } Else { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x0001ffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x0001ffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x0001ffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001cffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x001dffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001dffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001dffff, 3, _SB.PCI0.LPCB.LNKA, 0 }, - // AC97/IDE 0:1e.2, 0:1e.3 - Package() { 0x001effff, 0, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001effff, 1, _SB.PCI0.LPCB.LNKE, 0 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - }) - } -} diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c index 3b3ff66..ba8b1a5 100644 --- a/src/mainboard/kontron/986lcd-m/romstage.c +++ b/src/mainboard/kontron/986lcd-m/romstage.c @@ -190,13 +190,6 @@ /* Device 1d interrupt pin register */ RCBA32(0x310c) = 0x00214321;
- /* dev irq route register */ - RCBA16(0x3140) = 0x0132; - RCBA16(0x3142) = 0x3241; - RCBA16(0x3144) = 0x0237; - RCBA16(0x3146) = 0x3210; - RCBA16(0x3148) = 0x3210; - /* Enable IOAPIC */ RCBA8(0x31ff) = 0x03;
diff --git a/src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl b/src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl deleted file mode 100644 index f0d76db..0000000 --- a/src/mainboard/lenovo/t60/acpi/i945_pci_irqs.asl +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Sven Schnelle svens@stackframe.org - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for the - * i945 - */ - - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - Package() { 0x0002ffff, 0, 0, 0x10 }, // VGA - Package() { 0x001bffff, 1, 0, 0x11 }, // Audio - Package() { 0x001cffff, 0, 0, 0x14 }, // PCI bridge - Package() { 0x001cffff, 1, 0, 0x15 }, // PCI bridge - Package() { 0x001cffff, 2, 0, 0x16 }, // PCI bridge - Package() { 0x001cffff, 3, 0, 0x17 }, // PCI bridge - Package() { 0x001dffff, 0, 0, 0x10 }, // USB - Package() { 0x001dffff, 1, 0, 0x11 }, // USB - Package() { 0x001dffff, 2, 0, 0x12 }, // USB - Package() { 0x001dffff, 3, 0, 0x13 }, // USB - Package() { 0x001fffff, 0, 0, 0x17 }, // LPC - Package() { 0x001fffff, 1, 0, 0x10 }, // IDE - Package() { 0x001fffff, 2, 0, 0x10 } // SATA - }) - } Else { - Return (Package() { - Package() { 0x0002ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, // VGA - Package() { 0x001bffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, // Audio - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKE, 0 }, // PCI - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKF, 0 }, // PCI - Package() { 0x001cffff, 2, _SB.PCI0.LPCB.LNKG, 0 }, // PCI - Package() { 0x001cffff, 3, _SB.PCI0.LPCB.LNKH, 0 }, // PCI - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, // USB - Package() { 0x001dffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, // USB - Package() { 0x001dffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, // USB - Package() { 0x001dffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, // USB - Package() { 0x001fffff, 0, _SB.PCI0.LPCB.LNKH, 0 }, // LPC - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKA, 0 }, // IDE - Package() { 0x001fffff, 2, _SB.PCI0.LPCB.LNKA, 0 } // SATA - }) - } -} diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index 80b989f..fe255fd 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -91,13 +91,6 @@ /* HD Audio Interrupt */ RCBA32(0x3110) = 0x00000002;
- /* dev irq route register */ - RCBA16(0x3140) = 0x1007; - RCBA16(0x3142) = 0x0076; - RCBA16(0x3144) = 0x3210; - RCBA16(0x3146) = 0x7654; - RCBA16(0x3148) = 0x0010; - /* Enable IOAPIC */ RCBA8(0x31ff) = 0x03;
diff --git a/src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl b/src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl deleted file mode 100644 index f0d76db..0000000 --- a/src/mainboard/lenovo/x60/acpi/i945_pci_irqs.asl +++ /dev/null @@ -1,58 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 Sven Schnelle svens@stackframe.org - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for the - * i945 - */ - - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - Package() { 0x0002ffff, 0, 0, 0x10 }, // VGA - Package() { 0x001bffff, 1, 0, 0x11 }, // Audio - Package() { 0x001cffff, 0, 0, 0x14 }, // PCI bridge - Package() { 0x001cffff, 1, 0, 0x15 }, // PCI bridge - Package() { 0x001cffff, 2, 0, 0x16 }, // PCI bridge - Package() { 0x001cffff, 3, 0, 0x17 }, // PCI bridge - Package() { 0x001dffff, 0, 0, 0x10 }, // USB - Package() { 0x001dffff, 1, 0, 0x11 }, // USB - Package() { 0x001dffff, 2, 0, 0x12 }, // USB - Package() { 0x001dffff, 3, 0, 0x13 }, // USB - Package() { 0x001fffff, 0, 0, 0x17 }, // LPC - Package() { 0x001fffff, 1, 0, 0x10 }, // IDE - Package() { 0x001fffff, 2, 0, 0x10 } // SATA - }) - } Else { - Return (Package() { - Package() { 0x0002ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, // VGA - Package() { 0x001bffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, // Audio - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKE, 0 }, // PCI - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKF, 0 }, // PCI - Package() { 0x001cffff, 2, _SB.PCI0.LPCB.LNKG, 0 }, // PCI - Package() { 0x001cffff, 3, _SB.PCI0.LPCB.LNKH, 0 }, // PCI - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, // USB - Package() { 0x001dffff, 1, _SB.PCI0.LPCB.LNKB, 0 }, // USB - Package() { 0x001dffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, // USB - Package() { 0x001dffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, // USB - Package() { 0x001fffff, 0, _SB.PCI0.LPCB.LNKH, 0 }, // LPC - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKA, 0 }, // IDE - Package() { 0x001fffff, 2, _SB.PCI0.LPCB.LNKA, 0 } // SATA - }) - } -} diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index eddb150..50136f2 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -91,13 +91,6 @@ /* HD Audio Interrupt */ RCBA32(0x3110) = 0x00000002;
- /* dev irq route register */ - RCBA16(0x3140) = 0x1007; - RCBA16(0x3142) = 0x0076; - RCBA16(0x3144) = 0x3210; - RCBA16(0x3146) = 0x7654; - RCBA16(0x3148) = 0x0010; - /* Enable IOAPIC */ RCBA8(0x31ff) = 0x03;
diff --git a/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl b/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl deleted file mode 100644 index a7d999e..0000000 --- a/src/mainboard/roda/rk886ex/acpi/i945_pci_irqs.asl +++ /dev/null @@ -1,79 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007-2009 coresystems GmbH - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* This is board specific information: IRQ routing for the - * i945 - */ - - -// PCI Interrupt Routing -Method(_PRT) -{ - If (PICM) { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, 0, 16 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, 0, 16 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, 0, 22 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, 0, 17 }, - Package() { 0x001cffff, 1, 0, 16 }, - Package() { 0x001cffff, 2, 0, 18 }, - Package() { 0x001cffff, 3, 0, 19 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, 0, 23 }, - Package() { 0x001dffff, 1, 0, 19 }, - Package() { 0x001dffff, 2, 0, 18 }, - Package() { 0x001dffff, 3, 0, 16 }, - // AC97 0:1e.2, 0:1e.3 - Package() { 0x001effff, 0, 0, 22 }, - Package() { 0x001effff, 1, 0, 20 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, 0, 18 }, - Package() { 0x001fffff, 1, 0, 19 }, - Package() { 0x001fffff, 1, 0, 20 }, - Package() { 0x001fffff, 3, 0, 16 } - }) - } Else { - Return (Package() { - // PCIe Graphics 0:1.0 - Package() { 0x0001ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // Onboard graphics (IGD) 0:2.0 - Package() { 0x0002ffff, 0, _SB.PCI0.LPCB.LNKA, 0 }, - // High Definition Audio 0:1b.0 - Package() { 0x001bffff, 0, _SB.PCI0.LPCB.LNKG, 0 }, - // PCIe Root Ports 0:1c.x - Package() { 0x001cffff, 0, _SB.PCI0.LPCB.LNKB, 0 }, - Package() { 0x001cffff, 1, _SB.PCI0.LPCB.LNKA, 0 }, - Package() { 0x001cffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001cffff, 3, _SB.PCI0.LPCB.LNKD, 0 }, - // USB and EHCI 0:1d.x - Package() { 0x001dffff, 0, _SB.PCI0.LPCB.LNKH, 0 }, - Package() { 0x001dffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001dffff, 2, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001dffff, 3, _SB.PCI0.LPCB.LNKA, 0 }, - // AC97 0:1e.2, 0:1e.3 - Package() { 0x001effff, 0, _SB.PCI0.LPCB.LNKG, 0 }, - Package() { 0x001effff, 1, _SB.PCI0.LPCB.LNKE, 0 }, - // LPC device 0:1f.0 - Package() { 0x001fffff, 0, _SB.PCI0.LPCB.LNKC, 0 }, - Package() { 0x001fffff, 1, _SB.PCI0.LPCB.LNKD, 0 }, - Package() { 0x001fffff, 3, _SB.PCI0.LPCB.LNKA, 0 } - }) - } -} diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c index a488488..20e51db 100644 --- a/src/mainboard/roda/rk886ex/romstage.c +++ b/src/mainboard/roda/rk886ex/romstage.c @@ -125,13 +125,6 @@ /* Device 1d interrupt pin register */ RCBA32(0x310c) = 0x00214321;
- /* dev irq route register */ - RCBA16(0x3140) = 0x0232; - RCBA16(0x3142) = 0x3246; - RCBA16(0x3144) = 0x0237; - RCBA16(0x3146) = 0x3201; - RCBA16(0x3148) = 0x3216; - /* Enable IOAPIC */ RCBA8(0x31ff) = 0x03;
diff --git a/src/northbridge/intel/i945/acpi/hostbridge.asl b/src/northbridge/intel/i945/acpi/hostbridge.asl index 5877b0e..7b3917d 100644 --- a/src/northbridge/intel/i945/acpi/hostbridge.asl +++ b/src/northbridge/intel/i945/acpi/hostbridge.asl @@ -228,6 +228,3 @@
Return (MCRS) } - -/* IRQ assignment is mainboard specific. Get it from mainboard ACPI code */ -#include "acpi/i945_pci_irqs.asl" diff --git a/src/northbridge/intel/pineview/acpi/hostbridge.asl b/src/northbridge/intel/pineview/acpi/hostbridge.asl index d759514..3eff101 100644 --- a/src/northbridge/intel/pineview/acpi/hostbridge.asl +++ b/src/northbridge/intel/pineview/acpi/hostbridge.asl @@ -230,6 +230,3 @@
Return (MCRS) } - -/* IRQ assignment is mainboard specific. Get it from mainboard ACPI code */ -#include "acpi/pineview_pci_irqs.asl" diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index fd7579a..03e8923 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -26,6 +26,7 @@ select SPI_FLASH select SOUTHBRIDGE_INTEL_COMMON_GPIO select SOUTHBRIDGE_INTEL_COMMON_SMBUS + select SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN
if SOUTHBRIDGE_INTEL_I82801GX
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index a26b9f8..9da8507 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -32,6 +32,7 @@ #include <cbmem.h> #include <string.h> #include <drivers/intel/gma/i915.h> +#include <southbridge/intel/common/acpi_pirq_gen.h> #include "nvs.h"
#define NMI_OFF 0 @@ -684,6 +685,14 @@ } }
+static void southbridge_fill_ssdt(device_t device) +{ + /* + * Generates PIRQ ACPI table with assumption DxxIR are at + * reset default. */ + gen_def_acpi_pirq(); +} + static struct pci_operations pci_ops = { .set_subsystem = set_subsystem, }; @@ -694,6 +703,7 @@ .enable_resources = pci_dev_enable_resources, .acpi_inject_dsdt_generator = southbridge_inject_dsdt, .write_acpi_tables = acpi_write_hpet, + .acpi_fill_ssdt_generator = southbridge_fill_ssdt, .init = lpc_init, .scan_bus = scan_lpc_bus, .enable = i82801gx_enable,
-
Arthur Heymans (Code Review)