[M] Change in coreboot[master]: mb/siemens/mc_apl*: Enable early PCI bridge before FSP-M

[Angel Pons (Code Review)]

Attention is currently required from: Werner Zeh, Jan Samek.

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68223 )

Change subject: mb/siemens/mc_apl*: Enable early PCI bridge before FSP-M
......................................................................

Patch Set 3: Code-Review+1

(5 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/68223/comment/37cb13c5_4abf16fb 
PS3, Line 14: certain cases (like this one - emitting POST codes through a PCIe
            : device).
The text in parentheses feels a bit "loose". How about:
> ... in certain cases, such as emitting POST codes through a PCIe device.

https://review.coreboot.org/c/coreboot/+/68223/comment/b1a7b25f_e7c4fbfd 
PS3, Line 17: inicialization
nit: ini*t*ialization

https://review.coreboot.org/c/coreboot/+/68223/comment/39b5b654_23edee60 
PS3, Line 18: IAFW
IAFW BIOS spec

Looks like the full document title is:
```
Apollo Lake Platform
Intel Architecture Firmware 
Specification (Volume 2 of 2)
BIOS Specification
```

Patchset:

PS3: 
Thanks for making this pretty! Will let Werner (or anyone else) give a +2, since we both authored this change.

File src/mainboard/siemens/mc_apl1/bootblock.c:

https://review.coreboot.org/c/coreboot/+/68223/comment/5ab9836d_fdae6c7c 
PS3, Line 20: IAFW spec
IAFW BIOS spec