Cliff Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/77614?usp=email )
Change subject: soc/intel/common: Add functions for getting address bits taken by MKTME ......................................................................
soc/intel/common: Add functions for getting address bits taken by MKTME
get_tme_bit_size(): Get number of address bits used by TME get_reserved_address_bits(): Get number of address bits taken by enabled features. Add defines for TME_ACTIVATE MSR
BUG=288978352 TEST=Boot to OS and check the address bits from ACPI DMAR table
Signed-off-by: Cliff Huang cliff.huang@intel.com Change-Id: Ib60e8da58fcc789e99ba93b177c1dff6b635f116 --- M src/soc/intel/common/block/cpu/cpulib.c M src/soc/intel/common/block/include/intelblocks/cpulib.h M src/soc/intel/common/block/include/intelblocks/msr.h 3 files changed, 36 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/77614/1
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c index c317e05..f0ad45b 100644 --- a/src/soc/intel/common/block/cpu/cpulib.c +++ b/src/soc/intel/common/block/cpu/cpulib.c @@ -501,6 +501,22 @@ wrmsr(MSR_CORE_MKTME_ACTIVATION, msr); }
+int get_tme_bit_size(void) +{ + if (is_tme_supported()) { + msr_t msr = rdmsr(MSR_IA32_TME_ACTIVATE); + if (msr.lo & MSR_IA32_TME_ACTIVATE_HW_ENCRYPT_EN) + return (msr.hi >> (MSR_IA32_TME_ACTIVATE_MK_TME_KEYID_BITS_SHIFT - 32)) & + MSR_IA32_TME_ACTIVATE_MK_TME_KEYID_BITS_MASK; + } + return 0; +} + +uint32_t get_reserved_address_bits(void) +{ + return get_tme_bit_size(); +} + /* Provide the max turbo frequency of the CPU */ unsigned int smbios_cpu_get_max_speed_mhz(void) { diff --git a/src/soc/intel/common/block/include/intelblocks/cpulib.h b/src/soc/intel/common/block/include/intelblocks/cpulib.h index cbc9e44..756fd03 100644 --- a/src/soc/intel/common/block/include/intelblocks/cpulib.h +++ b/src/soc/intel/common/block/include/intelblocks/cpulib.h @@ -208,6 +208,21 @@ void set_tme_core_activate(void);
/* + * Get number of address bits used by TME + * + * Returns TME_ACTIVATE[MK_TME_KEYID_BITS] ( MSR 0x982 Bits[32-35]) if TME is enaabled + * NOTE: This function should be called after MK-TME features has been configured in the MSRs + * according to the capabilities and platform configuration. For instance, after romstage FSP. + */ +int get_tme_bit_size(void); + +/* + * Returns number of bits occupied in the address bits + * + */ +uint32_t get_reserved_address_bits(void); + +/* * This function checks if the CPU supports SGX feature. * Returns true if SGX feature is supported otherwise false. */ diff --git a/src/soc/intel/common/block/include/intelblocks/msr.h b/src/soc/intel/common/block/include/intelblocks/msr.h index 9f95e9f..e9d7651 100644 --- a/src/soc/intel/common/block/include/intelblocks/msr.h +++ b/src/soc/intel/common/block/include/intelblocks/msr.h @@ -96,6 +96,11 @@ #define PKG_POWER_LIMIT_DUTYCYCLE_SHIFT 24 #define PKG_POWER_LIMIT_DUTYCYCLE_MASK (0x7f)
+#define MSR_IA32_TME_ACTIVATE 0x982 +#define MSR_IA32_TME_ACTIVATE_HW_ENCRYPT_EN (1 << 1) +#define MSR_IA32_TME_ACTIVATE_MK_TME_KEYID_BITS_SHIFT 32 +#define MSR_IA32_TME_ACTIVATE_MK_TME_KEYID_BITS_MASK (0xf) + #define MSR_CORE_MKTME_ACTIVATION 0x9ff /* SMM save state MSRs */ #define SMBASE_MSR 0xc20