[M] Change in coreboot[main]: soc/common/smbus: Add support for reading spd data via smbus for DDR5

[Tim Crawford (Code Review)]

Attention is currently required from: Angel Pons, Balaji Manigandan, Balaji Manigandan, Haribalaraman Ramasubramanian, Kapil Porwal, Karthik Ramasubramanian, Kyösti Mälkki, Maulik Vaghela, Meera Ravindranath, Nick Vaccaro, Patrick Rudolph, Raj Astekar, Reka Norman, Rizwan Qureshi, Subrata Banik, Tarun Tuli, Tim Wawrzynczak.

Tim Crawford has posted comments on this change by Meera Ravindranath. ( https://review.coreboot.org/c/coreboot/+/52731?usp=email )

Change subject: soc/common/smbus: Add support for reading spd data via smbus for DDR5
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Patch Set 15:

(1 comment)

Patchset:

PS15: 
SPD5 hub has 1024 byte EEPROM. Will need to merge changes from CB:82732 into this for it to work, and then CB:75283 can probably be dropped.



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