[XL] Change in coreboot[main]: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC

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Change subject: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC
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Patch Set 60:

(2 comments)

File src/soc/intel/snowridge/Kconfig:

https://review.coreboot.org/c/coreboot/+/83321/comment/3e0b6257_53de3848?usp... :
PS28, Line 270: config UNDEFINED_REGISTER
              : 	int
              : 	default 0
              : 	help
              : 	  To reuse intel common blocks, some undefined registers should be defined.
> I just pushed another patch that using a Kconfig item `HAVE_GPMR_REGISTERS` to select code, see http […]

Done

File src/soc/intel/snowridge/sriov.c:

https://review.coreboot.org/c/coreboot/+/83321/comment/a6665fc5_35655be2?usp... :
PS15, Line 12:
> not sure if this could be moved to common pci codes.

Let me keep it there and move it to common PCI code after it's merged.