Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41908 )
Change subject: soc,southbridge/amd: Remove some explicit zero-initializers ......................................................................
soc,southbridge/amd: Remove some explicit zero-initializers
Change-Id: I263c159fe4b7757dd5abfc0d6248e45b749df980 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/amd/picasso/acpi.c M src/soc/amd/stoneyridge/acpi.c M src/southbridge/amd/agesa/hudson/fadt.c M src/southbridge/amd/cimx/sb800/fadt.c M src/southbridge/amd/pi/hudson/fadt.c 5 files changed, 6 insertions(+), 46 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/41908/1
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 2eea6f9..d5a890b 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -111,16 +111,6 @@ fadt->smi_cmd = APM_CNT; fadt->acpi_enable = APM_CNT_ACPI_ENABLE; fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0; /* Not supported */ - fadt->pstate_cnt = 0; /* Not supported */ - fadt->cst_cnt = 0; /* Not supported */ - } else { - fadt->smi_cmd = 0; /* disable system management mode */ - fadt->acpi_enable = 0; /* unused if SMI_CMD = 0 */ - fadt->acpi_disable = 0; /* unused if SMI_CMD = 0 */ - fadt->s4bios_req = 0; /* unused if SMI_CMD = 0 */ - fadt->pstate_cnt = 0; /* unused if SMI_CMD = 0 */ - fadt->cst_cnt = 0x00; /* unused if SMI_CMD = 0 */ }
fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK; diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index c98a1b4..47d12bf 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -83,16 +83,6 @@ fadt->smi_cmd = APM_CNT; fadt->acpi_enable = APM_CNT_ACPI_ENABLE; fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0; /* Not supported */ - fadt->pstate_cnt = 0; /* Not supported */ - fadt->cst_cnt = 0; /* Not supported */ - } else { - fadt->smi_cmd = 0; /* disable system management mode */ - fadt->acpi_enable = 0; /* unused if SMI_CMD = 0 */ - fadt->acpi_disable = 0; /* unused if SMI_CMD = 0 */ - fadt->s4bios_req = 0; /* unused if SMI_CMD = 0 */ - fadt->pstate_cnt = 0; /* unused if SMI_CMD = 0 */ - fadt->cst_cnt = 0x00; /* unused if SMI_CMD = 0 */ }
fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK; diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c index 0476057..660598a 100644 --- a/src/southbridge/amd/agesa/hudson/fadt.c +++ b/src/southbridge/amd/agesa/hudson/fadt.c @@ -61,16 +61,6 @@ fadt->smi_cmd = ACPI_SMI_CTL_PORT; fadt->acpi_enable = ACPI_SMI_CMD_ENABLE; fadt->acpi_disable = ACPI_SMI_CMD_DISABLE; - fadt->s4bios_req = 0; /* Not supported */ - fadt->pstate_cnt = 0; /* Not supported */ - fadt->cst_cnt = 0; /* Not supported */ - } else { - fadt->smi_cmd = 0; /* disable system management mode */ - fadt->acpi_enable = 0; /* unused if SMI_CMD = 0 */ - fadt->acpi_disable = 0; /* unused if SMI_CMD = 0 */ - fadt->s4bios_req = 0; /* unused if SMI_CMD = 0 */ - fadt->pstate_cnt = 0; /* unused if SMI_CMD = 0 */ - fadt->cst_cnt = 0x00; /* unused if SMI_CMD = 0 */ }
fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK; diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c index 1939bac..e836cfb 100644 --- a/src/southbridge/amd/cimx/sb800/fadt.c +++ b/src/southbridge/amd/cimx/sb800/fadt.c @@ -61,11 +61,12 @@ fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */ fadt->preferred_pm_profile = FADT_PM_PROFILE; fadt->sci_int = 9; /* HUDSON 1 - IRQ 09 - ACPI SCI */ - fadt->smi_cmd = 0; /* disable system management mode */ - fadt->acpi_enable = 0; /* unused if SMI_CMD = 0 */ - fadt->acpi_disable = 0; /* unused if SMI_CMD = 0 */ - fadt->s4bios_req = 0; /* unused if SMI_CMD = 0 */ - fadt->pstate_cnt = 0; /* unused if SMI_CMD = 0 */ + + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = ACPI_SMI_CTL_PORT; + fadt->acpi_enable = ACPI_SMI_CMD_ENABLE; + fadt->acpi_disable = ACPI_SMI_CMD_DISABLE; + }
val = PM1_EVT_BLK_ADDRESS; WritePMIO(SB_PMIOA_REG60, AccWidthUint16, &val); @@ -109,7 +110,6 @@ fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0;
- fadt->cst_cnt = 0x00; /* unused if SMI_CMD = 0 */ fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->flush_size = 0; /* set to 0 if WBINVD is 1 in flags */ diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c index d45be9a..100cfb6 100644 --- a/src/southbridge/amd/pi/hudson/fadt.c +++ b/src/southbridge/amd/pi/hudson/fadt.c @@ -53,16 +53,6 @@ fadt->smi_cmd = ACPI_SMI_CTL_PORT; fadt->acpi_enable = ACPI_SMI_CMD_ENABLE; fadt->acpi_disable = ACPI_SMI_CMD_DISABLE; - fadt->s4bios_req = 0; /* Not supported */ - fadt->pstate_cnt = 0; /* Not supported */ - fadt->cst_cnt = 0; /* Not supported */ - } else { - fadt->smi_cmd = 0; /* disable system management mode */ - fadt->acpi_enable = 0; /* unused if SMI_CMD = 0 */ - fadt->acpi_disable = 0; /* unused if SMI_CMD = 0 */ - fadt->s4bios_req = 0; /* unused if SMI_CMD = 0 */ - fadt->pstate_cnt = 0; /* unused if SMI_CMD = 0 */ - fadt->cst_cnt = 0x00; /* unused if SMI_CMD = 0 */ }
fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK;
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41908
to look at the new patch set (#2).
Change subject: soc,southbridge/amd: Remove some explicit zero-initializers ......................................................................
soc,southbridge/amd: Remove some explicit zero-initializers
Change-Id: I263c159fe4b7757dd5abfc0d6248e45b749df980 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/amd/picasso/acpi.c M src/soc/amd/stoneyridge/acpi.c M src/southbridge/amd/agesa/hudson/fadt.c M src/southbridge/amd/cimx/sb800/fadt.c M src/southbridge/amd/pi/hudson/fadt.c 5 files changed, 5 insertions(+), 46 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/41908/2
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41908 )
Change subject: soc,southbridge/amd: Remove some explicit zero-initializers ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41908/2/src/southbridge/amd/cimx/sb... File src/southbridge/amd/cimx/sb800/fadt.c:
https://review.coreboot.org/c/coreboot/+/41908/2/src/southbridge/amd/cimx/sb... PS2, Line 68: } Any plans to add one? if not, why clutter the file if it's unlikely to be used in the future?
Hello build bot (Jenkins), wrong ID - Marshall Dawson, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41908
to look at the new patch set (#3).
Change subject: soc,southbridge/amd: Remove some explicit zero-initializers ......................................................................
soc,southbridge/amd: Remove some explicit zero-initializers
Change-Id: I263c159fe4b7757dd5abfc0d6248e45b749df980 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com --- M src/soc/amd/picasso/acpi.c M src/soc/amd/stoneyridge/acpi.c M src/southbridge/amd/agesa/hudson/fadt.c M src/southbridge/amd/cimx/sb800/fadt.c M src/southbridge/amd/pi/hudson/fadt.c 5 files changed, 0 insertions(+), 46 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/41908/3
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41908 )
Change subject: soc,southbridge/amd: Remove some explicit zero-initializers ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/41908/2/src/southbridge/amd/cimx/sb... File src/southbridge/amd/cimx/sb800/fadt.c:
https://review.coreboot.org/c/coreboot/+/41908/2/src/southbridge/amd/cimx/sb... PS2, Line 68: }
Any plans to add one? if not, why clutter the file if it's unlikely to be […]
No plans.
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41908 )
Change subject: soc,southbridge/amd: Remove some explicit zero-initializers ......................................................................
Patch Set 3: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41908 )
Change subject: soc,southbridge/amd: Remove some explicit zero-initializers ......................................................................
Patch Set 3: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41908 )
Change subject: soc,southbridge/amd: Remove some explicit zero-initializers ......................................................................
soc,southbridge/amd: Remove some explicit zero-initializers
Change-Id: I263c159fe4b7757dd5abfc0d6248e45b749df980 Signed-off-by: Kyösti Mälkki kyosti.malkki@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/41908 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Angel Pons th3fanbus@gmail.com --- M src/soc/amd/picasso/acpi.c M src/soc/amd/stoneyridge/acpi.c M src/southbridge/amd/agesa/hudson/fadt.c M src/southbridge/amd/cimx/sb800/fadt.c M src/southbridge/amd/pi/hudson/fadt.c 5 files changed, 0 insertions(+), 46 deletions(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Angel Pons: Looks good to me, approved
diff --git a/src/soc/amd/picasso/acpi.c b/src/soc/amd/picasso/acpi.c index 2eea6f9..d5a890b 100644 --- a/src/soc/amd/picasso/acpi.c +++ b/src/soc/amd/picasso/acpi.c @@ -111,16 +111,6 @@ fadt->smi_cmd = APM_CNT; fadt->acpi_enable = APM_CNT_ACPI_ENABLE; fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0; /* Not supported */ - fadt->pstate_cnt = 0; /* Not supported */ - fadt->cst_cnt = 0; /* Not supported */ - } else { - fadt->smi_cmd = 0; /* disable system management mode */ - fadt->acpi_enable = 0; /* unused if SMI_CMD = 0 */ - fadt->acpi_disable = 0; /* unused if SMI_CMD = 0 */ - fadt->s4bios_req = 0; /* unused if SMI_CMD = 0 */ - fadt->pstate_cnt = 0; /* unused if SMI_CMD = 0 */ - fadt->cst_cnt = 0x00; /* unused if SMI_CMD = 0 */ }
fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK; diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index c98a1b4..47d12bf 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -83,16 +83,6 @@ fadt->smi_cmd = APM_CNT; fadt->acpi_enable = APM_CNT_ACPI_ENABLE; fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0; /* Not supported */ - fadt->pstate_cnt = 0; /* Not supported */ - fadt->cst_cnt = 0; /* Not supported */ - } else { - fadt->smi_cmd = 0; /* disable system management mode */ - fadt->acpi_enable = 0; /* unused if SMI_CMD = 0 */ - fadt->acpi_disable = 0; /* unused if SMI_CMD = 0 */ - fadt->s4bios_req = 0; /* unused if SMI_CMD = 0 */ - fadt->pstate_cnt = 0; /* unused if SMI_CMD = 0 */ - fadt->cst_cnt = 0x00; /* unused if SMI_CMD = 0 */ }
fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK; diff --git a/src/southbridge/amd/agesa/hudson/fadt.c b/src/southbridge/amd/agesa/hudson/fadt.c index 0476057..660598a 100644 --- a/src/southbridge/amd/agesa/hudson/fadt.c +++ b/src/southbridge/amd/agesa/hudson/fadt.c @@ -61,16 +61,6 @@ fadt->smi_cmd = ACPI_SMI_CTL_PORT; fadt->acpi_enable = ACPI_SMI_CMD_ENABLE; fadt->acpi_disable = ACPI_SMI_CMD_DISABLE; - fadt->s4bios_req = 0; /* Not supported */ - fadt->pstate_cnt = 0; /* Not supported */ - fadt->cst_cnt = 0; /* Not supported */ - } else { - fadt->smi_cmd = 0; /* disable system management mode */ - fadt->acpi_enable = 0; /* unused if SMI_CMD = 0 */ - fadt->acpi_disable = 0; /* unused if SMI_CMD = 0 */ - fadt->s4bios_req = 0; /* unused if SMI_CMD = 0 */ - fadt->pstate_cnt = 0; /* unused if SMI_CMD = 0 */ - fadt->cst_cnt = 0x00; /* unused if SMI_CMD = 0 */ }
fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK; diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c index 1939bac..d2339c6 100644 --- a/src/southbridge/amd/cimx/sb800/fadt.c +++ b/src/southbridge/amd/cimx/sb800/fadt.c @@ -61,11 +61,6 @@ fadt->reserved = 0; /* reserved, should be 0 ACPI 3.0 */ fadt->preferred_pm_profile = FADT_PM_PROFILE; fadt->sci_int = 9; /* HUDSON 1 - IRQ 09 - ACPI SCI */ - fadt->smi_cmd = 0; /* disable system management mode */ - fadt->acpi_enable = 0; /* unused if SMI_CMD = 0 */ - fadt->acpi_disable = 0; /* unused if SMI_CMD = 0 */ - fadt->s4bios_req = 0; /* unused if SMI_CMD = 0 */ - fadt->pstate_cnt = 0; /* unused if SMI_CMD = 0 */
val = PM1_EVT_BLK_ADDRESS; WritePMIO(SB_PMIOA_REG60, AccWidthUint16, &val); @@ -109,7 +104,6 @@ fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0;
- fadt->cst_cnt = 0x00; /* unused if SMI_CMD = 0 */ fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->flush_size = 0; /* set to 0 if WBINVD is 1 in flags */ diff --git a/src/southbridge/amd/pi/hudson/fadt.c b/src/southbridge/amd/pi/hudson/fadt.c index d45be9a..100cfb6 100644 --- a/src/southbridge/amd/pi/hudson/fadt.c +++ b/src/southbridge/amd/pi/hudson/fadt.c @@ -53,16 +53,6 @@ fadt->smi_cmd = ACPI_SMI_CTL_PORT; fadt->acpi_enable = ACPI_SMI_CMD_ENABLE; fadt->acpi_disable = ACPI_SMI_CMD_DISABLE; - fadt->s4bios_req = 0; /* Not supported */ - fadt->pstate_cnt = 0; /* Not supported */ - fadt->cst_cnt = 0; /* Not supported */ - } else { - fadt->smi_cmd = 0; /* disable system management mode */ - fadt->acpi_enable = 0; /* unused if SMI_CMD = 0 */ - fadt->acpi_disable = 0; /* unused if SMI_CMD = 0 */ - fadt->s4bios_req = 0; /* unused if SMI_CMD = 0 */ - fadt->pstate_cnt = 0; /* unused if SMI_CMD = 0 */ - fadt->cst_cnt = 0x00; /* unused if SMI_CMD = 0 */ }
fadt->pm1a_evt_blk = ACPI_PM_EVT_BLK;
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41908 )
Change subject: soc,southbridge/amd: Remove some explicit zero-initializers ......................................................................
Patch Set 4:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/4827 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4826 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/4825 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/4824
Please note: This test is under development and might not be accurate at all!