Change in coreboot[master]: soc/intel/cannonlake/romstage: Reuse device pointer

[Felix Singer (Code Review)]

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52490 )

Change subject: soc/intel/cannonlake/romstage: Reuse device pointer
......................................................................

soc/intel/cannonlake/romstage: Reuse device pointer

Reuse `dev` pointer for SmbusEnable configuration and remove `smbus`
pointer.

Change-Id: I7ad7cdeb632eb52ae02b60ca51e7d4845dffdb0d
Signed-off-by: Felix Singer 
---
M src/soc/intel/cannonlake/romstage/fsp_params.c
1 file changed, 2 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/52490/1

diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c
index c1fe5a7..450910c 100644
--- a/src/soc/intel/cannonlake/romstage/fsp_params.c
+++ b/src/soc/intel/cannonlake/romstage/fsp_params.c
@@ -136,7 +136,6 @@
 void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)
 {
    const struct device *dev = pcidev_path_on_root(PCH_DEVFN_LPC);
-	const struct device *smbus = pcidev_path_on_root(PCH_DEVFN_SMBUS);
    assert(dev != NULL);
    const config_t *config = config_of(dev);
    FSP_M_CONFIG *m_cfg = &mupd->FspmConfig;
@@ -145,10 +144,11 @@
    soc_memory_init_params(mupd, config);

/* Enable SMBus controller based on config */
+	dev = pcidev_path_on_root(PCH_DEVFN_SMBUS);
    if (!smbus)
    	m_cfg->SmbusEnable = 0;
    else
-		m_cfg->SmbusEnable = smbus->enabled;
+		m_cfg->SmbusEnable = dev->enabled;

/* Set debug probe type */
    m_cfg->PlatformDebugConsent =