[S] Change in coreboot[master]: drivers/intel/fsp2_0: Introduce early MRC cache store

[Nico Huber (Code Review)]

Attention is currently required from: Andrey Petrov, Felix Held, Fred Reitberger, Jason Glenesk, Kapil Porwal, Lean Sheng Tan, Martin L Roth, Matt DeVillier, Paul Menzel, Raul Rangel, Subrata Banik.

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77556?usp=email )

Change subject: drivers/intel/fsp2_0: Introduce early MRC cache store
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Patch Set 3:

(3 comments)

Commit Message:

https://review.coreboot.org/c/coreboot/+/77556/comment/e83bc6e1_2b9e2457 :
PS3, Line 43: +--------------------+--------------------------+--------------------------+-------------------------+
Not sure if the long tables are necessary as only a single item changes.

https://review.coreboot.org/c/coreboot/+/77556/comment/48fb50e5_c58a8682 :
PS3, Line 47: 
Maybe mention that this effectively undoes commit 7b5a93153a17, and why,
i.e. what changed since then (CSE sync, CBMEM caching).

File src/drivers/mrc_cache/mrc_cache.c:

https://review.coreboot.org/c/coreboot/+/77556/comment/316716ff_c210ab1e :
PS1, Line 742: BOOT_STATE_INIT_ENTRY(BS_OS_RESUME_CHECK, BS_ON_ENTRY, finalize_mrc_cache, NULL);
> > > > > This changes the order for devices with MRC_STASH_TO_CBMEM but without […]

Closing as the nature of the patch changed.