Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/23477
Change subject: nb/intel/pineview: Use postcar stage to tear down CAR ......................................................................
nb/intel/pineview: Use postcar stage to tear down CAR
This allows to cleanly migrate car globals
Tested on Intel D510MO, still boots fine.
Change-Id: I67887b87d8ca2439259c6e1b7349e4d93514194b Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/pineview/Makefile.inc M src/northbridge/intel/pineview/ram_calc.c 3 files changed, 8 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/23477/1
diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig index e8ef9d9..80f566a 100644 --- a/src/northbridge/intel/pineview/Kconfig +++ b/src/northbridge/intel/pineview/Kconfig @@ -29,6 +29,8 @@ select INTEL_EDID if MAINBOARD_DO_NATIVE_VGA_INIT select RELOCATABLE_RAMSTAGE select INTEL_GMA_ACPI + select POSTCAR_STAGE + select POSTCAR_CONSOLE
config BOOTBLOCK_NORTHBRIDGE_INIT string diff --git a/src/northbridge/intel/pineview/Makefile.inc b/src/northbridge/intel/pineview/Makefile.inc index a4c08c8..d7936c1 100644 --- a/src/northbridge/intel/pineview/Makefile.inc +++ b/src/northbridge/intel/pineview/Makefile.inc @@ -25,4 +25,6 @@ romstage-y += raminit.c romstage-y += early_init.c
+postcar-y += ram_calc.c + endif diff --git a/src/northbridge/intel/pineview/ram_calc.c b/src/northbridge/intel/pineview/ram_calc.c index 63f3942..82073c0 100644 --- a/src/northbridge/intel/pineview/ram_calc.c +++ b/src/northbridge/intel/pineview/ram_calc.c @@ -105,8 +105,6 @@ return (void *) top_of_ram; }
-#define ROMSTAGE_RAM_STACK_SIZE 0x5000 - /* setup_stack_and_mtrrs() determines the stack to use after * cache-as-ram is torn down as well as the MTRR settings to use. */ void *setup_stack_and_mtrrs(void) @@ -114,7 +112,7 @@ struct postcar_frame pcf; uintptr_t top_of_ram;
- if (postcar_frame_init(&pcf, ROMSTAGE_RAM_STACK_SIZE)) + if (postcar_frame_init(&pcf, 1*KiB)) die("Unable to initialize postcar frame.\n");
/* Cache the ROM as WP just below 4GiB. */ @@ -133,8 +131,7 @@ postcar_frame_add_mtrr(&pcf, top_of_ram - 4*MiB, 4*MiB, MTRR_TYPE_WRBACK); postcar_frame_add_mtrr(&pcf, top_of_ram - 8*MiB, 4*MiB, MTRR_TYPE_WRBACK);
- /* Save the number of MTRRs to setup. Return the stack location - * pointing to the number of MTRRs. - */ - return postcar_commit_mtrrs(&pcf); + run_postcar_phase(&pcf); + /* We don't return here */ + return NULL; }