New patch to review for coreboot: 4ee7564 mainboard: Kill off some ancient-aliens non-CAR romcc boards
Edward O'Callaghan (eocallaghan@alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7346
-gerrit
commit 4ee756432c5c887caf128cf14b48e3672a3e38ca Author: Edward O'Callaghan eocallaghan@alterapraxis.com Date: Thu Nov 6 10:53:14 2014 +1100
mainboard: Kill off some ancient-aliens non-CAR romcc boards
Change-Id: I506d99c6a63a24cc512c8379b225bc2a60d43335 Signed-off-by: Edward O'Callaghan eocallaghan@alterapraxis.com --- src/mainboard/Kconfig | 18 -- src/mainboard/advantech/Kconfig | 35 --- src/mainboard/advantech/pcm-5820/Kconfig | 45 ---- src/mainboard/advantech/pcm-5820/board_info.txt | 5 - src/mainboard/advantech/pcm-5820/devicetree.cb | 56 ----- src/mainboard/advantech/pcm-5820/irq_tables.c | 45 ---- src/mainboard/advantech/pcm-5820/romstage.c | 41 ---- src/mainboard/asi/Kconfig | 38 ---- src/mainboard/asi/mb_5blgp/Kconfig | 45 ---- src/mainboard/asi/mb_5blgp/board_info.txt | 2 - src/mainboard/asi/mb_5blgp/devicetree.cb | 55 ----- src/mainboard/asi/mb_5blgp/irq_tables.c | 46 ---- src/mainboard/asi/mb_5blgp/romstage.c | 41 ---- src/mainboard/asi/mb_5blmp/Kconfig | 45 ---- src/mainboard/asi/mb_5blmp/board_info.txt | 4 - src/mainboard/asi/mb_5blmp/devicetree.cb | 48 ----- src/mainboard/asi/mb_5blmp/irq_tables.c | 39 ---- src/mainboard/asi/mb_5blmp/romstage.c | 42 ---- src/mainboard/axus/Kconfig | 35 --- src/mainboard/axus/tc320/Kconfig | 46 ---- src/mainboard/axus/tc320/board_info.txt | 2 - src/mainboard/axus/tc320/devicetree.cb | 55 ----- src/mainboard/axus/tc320/irq_tables.c | 122 ----------- src/mainboard/axus/tc320/romstage.c | 42 ---- src/mainboard/bcom/Kconfig | 3 - src/mainboard/bcom/winnet100/Kconfig | 46 ---- src/mainboard/bcom/winnet100/board_info.txt | 4 - src/mainboard/bcom/winnet100/devicetree.cb | 56 ----- src/mainboard/bcom/winnet100/irq_tables.c | 121 ----------- src/mainboard/bcom/winnet100/romstage.c | 42 ---- src/mainboard/bifferos/Kconfig | 36 ---- src/mainboard/bifferos/bifferboard/Kconfig | 21 -- src/mainboard/bifferos/bifferboard/board_info.txt | 1 - src/mainboard/bifferos/bifferboard/devicetree.cb | 8 - src/mainboard/bifferos/bifferboard/romstage.c | 62 ------ src/mainboard/digitallogic/Kconfig | 3 - src/mainboard/digitallogic/msm586seg/Kconfig | 23 -- .../digitallogic/msm586seg/board_info.txt | 2 - src/mainboard/digitallogic/msm586seg/cmos.layout | 72 ------- src/mainboard/digitallogic/msm586seg/devicetree.cb | 7 - src/mainboard/digitallogic/msm586seg/irq_tables.c | 31 --- src/mainboard/digitallogic/msm586seg/mainboard.c | 133 ------------ src/mainboard/digitallogic/msm586seg/romstage.c | 240 --------------------- src/mainboard/technologic/Kconfig | 17 -- src/mainboard/technologic/ts5300/Kconfig | 23 -- src/mainboard/technologic/ts5300/board_info.txt | 2 - src/mainboard/technologic/ts5300/cmos.layout | 72 ------- src/mainboard/technologic/ts5300/devicetree.cb | 6 - src/mainboard/technologic/ts5300/irq_tables.c | 31 --- src/mainboard/technologic/ts5300/mainboard.c | 147 ------------- src/mainboard/technologic/ts5300/romstage.c | 169 --------------- src/mainboard/televideo/Kconfig | 35 --- src/mainboard/televideo/tc7020/Kconfig | 45 ---- src/mainboard/televideo/tc7020/board_info.txt | 2 - src/mainboard/televideo/tc7020/devicetree.cb | 57 ----- src/mainboard/televideo/tc7020/irq_tables.c | 148 ------------- src/mainboard/televideo/tc7020/romstage.c | 42 ---- 57 files changed, 2659 deletions(-)
diff --git a/src/mainboard/Kconfig b/src/mainboard/Kconfig index 29b439c..5934d36 100644 --- a/src/mainboard/Kconfig +++ b/src/mainboard/Kconfig @@ -12,8 +12,6 @@ config VENDOR_ADLINK bool "ADLINK" config VENDOR_ADVANSUS bool "Advansus" -config VENDOR_ADVANTECH - bool "Advantech" config VENDOR_AMD bool "AMD" config VENDOR_AOPEN @@ -24,8 +22,6 @@ config VENDOR_ARIMA bool "Arima" config VENDOR_ARTECGROUP bool "Artec Group" -config VENDOR_ASI - bool "ASI" config VENDOR_ASROCK bool "ASROCK" config VENDOR_ASUS @@ -34,16 +30,12 @@ config VENDOR_A_TREND bool "A-Trend" config VENDOR_AVALUE bool "AVALUE" -config VENDOR_AXUS - bool "AXUS" config VENDOR_AZZA bool "AZZA" config VENDOR_BACHMANN bool "Bachmann electronic" config VENDOR_BCOM bool "BCOM" -config VENDOR_BIFFEROS - bool "Bifferos" config VENDOR_BIOSTAR bool "Biostar" config VENDOR_BROADCOM @@ -128,10 +120,6 @@ config VENDOR_SUPERMICRO bool "Supermicro" config VENDOR_TECHNEXION bool "Technexion" -config VENDOR_TECHNOLOGIC - bool "Technologic" -config VENDOR_TELEVIDEO - bool "TeleVideo" config VENDOR_TI bool "TI" config VENDOR_THOMSON @@ -154,21 +142,17 @@ source "src/mainboard/aaeon/Kconfig" source "src/mainboard/abit/Kconfig" source "src/mainboard/adlink/Kconfig" source "src/mainboard/advansus/Kconfig" -source "src/mainboard/advantech/Kconfig" source "src/mainboard/amd/Kconfig" source "src/mainboard/aopen/Kconfig" source "src/mainboard/apple/Kconfig" source "src/mainboard/arima/Kconfig" source "src/mainboard/artecgroup/Kconfig" -source "src/mainboard/asi/Kconfig" source "src/mainboard/asrock/Kconfig" source "src/mainboard/asus/Kconfig" source "src/mainboard/avalue/Kconfig" -source "src/mainboard/axus/Kconfig" source "src/mainboard/azza/Kconfig" source "src/mainboard/bachmann/Kconfig" source "src/mainboard/bcom/Kconfig" -source "src/mainboard/bifferos/Kconfig" source "src/mainboard/biostar/Kconfig" source "src/mainboard/broadcom/Kconfig" source "src/mainboard/compaq/Kconfig" @@ -211,8 +195,6 @@ source "src/mainboard/soyo/Kconfig" source "src/mainboard/sunw/Kconfig" source "src/mainboard/supermicro/Kconfig" source "src/mainboard/technexion/Kconfig" -source "src/mainboard/technologic/Kconfig" -source "src/mainboard/televideo/Kconfig" source "src/mainboard/thomson/Kconfig" source "src/mainboard/ti/Kconfig" source "src/mainboard/traverse/Kconfig" diff --git a/src/mainboard/advantech/Kconfig b/src/mainboard/advantech/Kconfig deleted file mode 100644 index ab46f96..0000000 --- a/src/mainboard/advantech/Kconfig +++ /dev/null @@ -1,35 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -if VENDOR_ADVANTECH - -choice - prompt "Mainboard model" - -config BOARD_ADVANTECH_PCM_5820 - bool "PCM-5820" - -endchoice - -source "src/mainboard/advantech/pcm-5820/Kconfig" - -config MAINBOARD_VENDOR - string - default "Advantech" - -endif # VENDOR_ADVANTECH diff --git a/src/mainboard/advantech/pcm-5820/Kconfig b/src/mainboard/advantech/pcm-5820/Kconfig deleted file mode 100644 index 86bcd7a..0000000 --- a/src/mainboard/advantech/pcm-5820/Kconfig +++ /dev/null @@ -1,45 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -if BOARD_ADVANTECH_PCM_5820 - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_AMD_GEODE_GX1 - select NORTHBRIDGE_AMD_GX1 - select SOUTHBRIDGE_AMD_CS5530 - select SUPERIO_WINBOND_W83977F - select ROMCC - select HAVE_PIRQ_TABLE - select PIRQ_ROUTE - select UDELAY_TSC - select BOARD_ROMSIZE_KB_256 - -config MAINBOARD_DIR - string - default advantech/pcm-5820 - -config MAINBOARD_PART_NUMBER - string - default "PCM-5820" - -config IRQ_SLOT_COUNT - int - default 2 - -endif # BOARD_ADVANTECH_PCM_5820 diff --git a/src/mainboard/advantech/pcm-5820/board_info.txt b/src/mainboard/advantech/pcm-5820/board_info.txt deleted file mode 100644 index 84b3c8d..0000000 --- a/src/mainboard/advantech/pcm-5820/board_info.txt +++ /dev/null @@ -1,5 +0,0 @@ -Category: half -Board URL: http://taiwan.advantech.com.tw/products/Model_Detail.asp?model_id=1-1TGZL8 -ROM package: PLCC32 -ROM socketed: y -Flashrom support: y diff --git a/src/mainboard/advantech/pcm-5820/devicetree.cb b/src/mainboard/advantech/pcm-5820/devicetree.cb deleted file mode 100644 index 8027ee2..0000000 --- a/src/mainboard/advantech/pcm-5820/devicetree.cb +++ /dev/null @@ -1,56 +0,0 @@ -chip northbridge/amd/gx1 # Northbridge - device domain 0 on # PCI domain - device pci 0.0 on end # Host bridge - chip southbridge/amd/cs5530 # Southbridge - device pci 12.0 on # ISA bridge - chip superio/winbond/w83977f # SUper I/O - device pnp 3f0.0 on # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 3f0.1 on # Parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 3f0.2 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 3f0.3 on # COM2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 3f0.4 on # RTC / On-Now control - io 0x60 = 0x70 - irq 0x70 = 8 - end - device pnp 3f0.5 on # PS/2 keyboard / mouse - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 # PS/2 keyboard interrupt - irq 0x72 = 12 # PS/2 mouse interrupt - end - device pnp 3f0.6 on # IR - # TODO? - end - device pnp 3f0.7 on # GPIO 1 - # TODO? - end - device pnp 3f0.8 on # GPIO 2 - # TODO? - end - end - end - device pci 12.1 on end # SMI - device pci 12.2 on end # IDE - device pci 12.3 on end # Audio (onboard) - device pci 12.4 on end # VGA - device pci 13.0 on end # USB - register "ide0_enable" = "1" - register "ide1_enable" = "1" - end - end - chip cpu/amd/geode_gx1 # CPU - end -end diff --git a/src/mainboard/advantech/pcm-5820/irq_tables.c b/src/mainboard/advantech/pcm-5820/irq_tables.c deleted file mode 100644 index ac25227..0000000 --- a/src/mainboard/advantech/pcm-5820/irq_tables.c +++ /dev/null @@ -1,45 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Uwe Hermann uwe@hermann-uwe.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, - PIRQ_VERSION, - 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */ - 0x00, /* Interrupt router bus */ - (0x12 << 3) | 0x0, /* Interrupt router device */ - 0xc00, /* IRQs devoted exclusively to PCI usage */ - 0x1078, /* Vendor */ - 0x2, /* Device */ - 0, /* Miniport data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0xde, /* Checksum */ - { - /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00, (0x0b << 3) | 0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x1, 0x0}, - {0x00, (0x13 << 3) | 0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/advantech/pcm-5820/romstage.c b/src/mainboard/advantech/pcm-5820/romstage.c deleted file mode 100644 index a6b856e..0000000 --- a/src/mainboard/advantech/pcm-5820/romstage.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Uwe Hermann uwe@hermann-uwe.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <arch/hlt.h> -#include <console/console.h> -#include "northbridge/amd/gx1/raminit.c" -#include "cpu/x86/bist.h" -#include "superio/winbond/w83977f/early_serial.c" -#include "southbridge/amd/cs5530/enable_rom.c" - -#define SERIAL_DEV PNP_DEV(0x3f0, W83977F_SP1) - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - w83977f_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - report_bist_failure(bist); - cs5530_enable_rom(); - sdram_init(); -} diff --git a/src/mainboard/asi/Kconfig b/src/mainboard/asi/Kconfig deleted file mode 100644 index 29f0895..0000000 --- a/src/mainboard/asi/Kconfig +++ /dev/null @@ -1,38 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -if VENDOR_ASI - -choice - prompt "Mainboard model" - -config BOARD_ASI_MB_5BLGP - bool "MB-5BLGP" -config BOARD_ASI_MB_5BLMP - bool "MB-5BLMP" - -endchoice - -source "src/mainboard/asi/mb_5blgp/Kconfig" -source "src/mainboard/asi/mb_5blmp/Kconfig" - -config MAINBOARD_VENDOR - string - default "ASI" - -endif # VENDOR_ASI diff --git a/src/mainboard/asi/mb_5blgp/Kconfig b/src/mainboard/asi/mb_5blgp/Kconfig deleted file mode 100644 index f69f6ef..0000000 --- a/src/mainboard/asi/mb_5blgp/Kconfig +++ /dev/null @@ -1,45 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -if BOARD_ASI_MB_5BLGP - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_AMD_GEODE_GX1 - select NORTHBRIDGE_AMD_GX1 - select SOUTHBRIDGE_AMD_CS5530 - select SUPERIO_NSC_PC87351 - select ROMCC - select HAVE_PIRQ_TABLE - select PIRQ_ROUTE - select UDELAY_TSC - select BOARD_ROMSIZE_KB_256 - -config MAINBOARD_DIR - string - default asi/mb_5blgp - -config MAINBOARD_PART_NUMBER - string - default "MB-5BLGP" - -config IRQ_SLOT_COUNT - int - default 3 - -endif # BOARD_ASI_MB_5BLGP diff --git a/src/mainboard/asi/mb_5blgp/board_info.txt b/src/mainboard/asi/mb_5blgp/board_info.txt deleted file mode 100644 index 0dcbbea..0000000 --- a/src/mainboard/asi/mb_5blgp/board_info.txt +++ /dev/null @@ -1,2 +0,0 @@ -Board name: MB-5BLGP (Neoware Eon 4000s) -Category: settop diff --git a/src/mainboard/asi/mb_5blgp/devicetree.cb b/src/mainboard/asi/mb_5blgp/devicetree.cb deleted file mode 100644 index d84bf0e..0000000 --- a/src/mainboard/asi/mb_5blgp/devicetree.cb +++ /dev/null @@ -1,55 +0,0 @@ -chip northbridge/amd/gx1 # Northbridge - device domain 0 on # PCI domain - device pci 0.0 on end # Host bridge - chip southbridge/amd/cs5530 # Southbridge - device pci 0f.0 on end # Ethernet - device pci 12.0 on # ISA bridge - chip superio/nsc/pc87351 # Super I/O - device pnp 2e.0 off # Floppy - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.1 on # Parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 2e.2 on # COM2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.e on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.4 on # System wake-up control (SWC) - irq 0x60 = 0x500 - end - device pnp 2e.5 on # PS/2 mouse - irq 0x70 = 12 - end - device pnp 2e.6 on # PS/2 keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - end - device pnp 2e.7 on # GPIO - irq 0x60 = 0x800 - end - device pnp 2e.8 on # Fan speed control - irq 0x60 = 0x900 - end - end - end - device pci 12.1 off end # SMI - device pci 12.2 on end # IDE - device pci 12.3 on end # Audio - device pci 12.4 on end # VGA - device pci 13.0 on end # USB - register "ide0_enable" = "1" - register "ide1_enable" = "0" # No connector on this board - end - end - chip cpu/amd/geode_gx1 # CPU - end -end diff --git a/src/mainboard/asi/mb_5blgp/irq_tables.c b/src/mainboard/asi/mb_5blgp/irq_tables.c deleted file mode 100644 index b37e8f9..0000000 --- a/src/mainboard/asi/mb_5blgp/irq_tables.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008 Uwe Hermann uwe@hermann-uwe.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, - PIRQ_VERSION, - 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. number of devices on the bus */ - 0x00, /* Interrupt router bus */ - (0x12 << 3) | 0x0, /* Interrupt router device */ - 0x8800, /* IRQs devoted exclusively to PCI usage */ - 0x1078, /* Vendor */ - 0x2, /* Device */ - 0, /* Miniport data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x96, /* Checksum */ - { - /* bus, dev | fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00, (0x07 << 3) | 0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0x0deb8}}, 0x1, 0x0}, /* ISA slot (?) */ - {0x00, (0x0f << 3) | 0x0, {{0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x01, 0xdeb8}, {0x02, 0x0deb8}}, 0x2, 0x0}, /* NIC */ - {0x00, (0x13 << 3) | 0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, /* USB */ - } -}; - -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/asi/mb_5blgp/romstage.c b/src/mainboard/asi/mb_5blgp/romstage.c deleted file mode 100644 index 43c5cf7..0000000 --- a/src/mainboard/asi/mb_5blgp/romstage.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008 Uwe Hermann uwe@hermann-uwe.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <arch/hlt.h> -#include <console/console.h> -#include "northbridge/amd/gx1/raminit.c" -#include "cpu/x86/bist.h" -#include "superio/nsc/pc87351/early_serial.c" -#include "southbridge/amd/cs5530/enable_rom.c" - -#define SERIAL_DEV PNP_DEV(0x2e, PC87351_SP1) - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - pc87351_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - report_bist_failure(bist); - cs5530_enable_rom(); - sdram_init(); -} diff --git a/src/mainboard/asi/mb_5blmp/Kconfig b/src/mainboard/asi/mb_5blmp/Kconfig deleted file mode 100644 index a40c86c..0000000 --- a/src/mainboard/asi/mb_5blmp/Kconfig +++ /dev/null @@ -1,45 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -if BOARD_ASI_MB_5BLMP - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_AMD_GEODE_GX1 - select NORTHBRIDGE_AMD_GX1 - select SOUTHBRIDGE_AMD_CS5530 - select SUPERIO_NSC_PC87351 - select ROMCC - select HAVE_PIRQ_TABLE - select PIRQ_ROUTE - select UDELAY_TSC - select BOARD_ROMSIZE_KB_256 - -config MAINBOARD_DIR - string - default asi/mb_5blmp - -config MAINBOARD_PART_NUMBER - string - default "MB-5BLMP" - -config IRQ_SLOT_COUNT - int - default 5 - -endif # BOARD_ASI_MB_5BLMP diff --git a/src/mainboard/asi/mb_5blmp/board_info.txt b/src/mainboard/asi/mb_5blmp/board_info.txt deleted file mode 100644 index da529cb..0000000 --- a/src/mainboard/asi/mb_5blmp/board_info.txt +++ /dev/null @@ -1,4 +0,0 @@ -Board name: MB-5BLMP (IGEL WinNET III) -Category: settop -Board URL: http://www.hojerteknik.com/winnet.htm -Flashrom support: y diff --git a/src/mainboard/asi/mb_5blmp/devicetree.cb b/src/mainboard/asi/mb_5blmp/devicetree.cb deleted file mode 100644 index e8e6ac3..0000000 --- a/src/mainboard/asi/mb_5blmp/devicetree.cb +++ /dev/null @@ -1,48 +0,0 @@ -chip northbridge/amd/gx1 # Northbridge - device domain 0 on - device pci 0.0 on end # Host bridge - chip southbridge/amd/cs5530 # Southbridge - device pci 0f.0 off end # Ethernet (Realtek RTL8139B) - device pci 12.0 on # ISA bridge - chip superio/nsc/pc87351 # Super I/O - device pnp 2e.4 on # PS/2 keyboard (+ mouse?) - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - # irq 0x72 = 12 - end - device pnp 2e.a on # PS/2 mouse - irq 0x70 = 12 - end - device pnp 2e.e on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.f off # Floppy - io 0x60 = 0x3f2 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.10 on # Parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 2e.12 on # COM2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - end - end - device pci 12.1 off end # SMI - device pci 12.2 on end # IDE - device pci 12.3 on end # Audio - device pci 12.4 on end # VGA (onboard) - device pci 13.0 on end # USB - register "ide0_enable" = "1" - register "ide1_enable" = "1" - end - end - chip cpu/amd/geode_gx1 # CPU - end -end - diff --git a/src/mainboard/asi/mb_5blmp/irq_tables.c b/src/mainboard/asi/mb_5blmp/irq_tables.c deleted file mode 100644 index 01d364d..0000000 --- a/src/mainboard/asi/mb_5blmp/irq_tables.c +++ /dev/null @@ -1,39 +0,0 @@ -/* TODO: This is currently copied from the IEI NOVA-4899R target, but it's - * quite surely wrong for this board. It gets me further in the boot process - * than using no irq_tables.c file at all, though! - */ - -/* TODO: Add license header. */ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, /* u32 signature */ - PIRQ_VERSION, /* u16 version */ - 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */ - 0x00, /* Where the interrupt router lies (bus) */ - (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */ - 0xe00, /* IRQs devoted exclusively to PCI usage */ - 0x1078, /* Vendor */ - 0x0002, /* Device */ - 0, /* Miniport data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x2d, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ - { - /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - // USB - {0x00,(0x13<<3)|0x0, {{0x01, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, - // eth0 - {0x00,(0x0a<<3)|0x0, {{0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},//0x3, 0x0}, - // eth1 - {0x00,(0x0b<<3)|0x0, {{0x03, 0xdeb8}, {0x04, 0xdeb8}, {0x02, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},//0x2, 0x0}, - // eth2 - {0x00,(0x0c<<3)|0x0, {{0x04, 0xdeb8}, {0x02, 0xdeb8}, {0x03, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0},//0x1, 0x0}, - // PCI slot - {0x00,(0x0f<<3)|0x0, {{0x04, 0xdeb8}, {0x03, 0xdeb8}, {0x02, 0xdeb8}, {0x00, 0x0deb8}}, 0x0, 0x0}, - } -}; -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/asi/mb_5blmp/romstage.c b/src/mainboard/asi/mb_5blmp/romstage.c deleted file mode 100644 index 1fb3378..0000000 --- a/src/mainboard/asi/mb_5blmp/romstage.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Uwe Hermann uwe@hermann-uwe.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <arch/hlt.h> -#include <console/console.h> -#include "northbridge/amd/gx1/raminit.c" -#include "superio/nsc/pc87351/early_serial.c" -#include "cpu/x86/bist.h" -#include "southbridge/amd/cs5530/enable_rom.c" - -#define SERIAL_DEV PNP_DEV(0x2e, PC87351_SP1) - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - pc87351_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - report_bist_failure(bist); - cs5530_enable_rom(); - sdram_init(); -} diff --git a/src/mainboard/axus/Kconfig b/src/mainboard/axus/Kconfig deleted file mode 100644 index cdf807f..0000000 --- a/src/mainboard/axus/Kconfig +++ /dev/null @@ -1,35 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -if VENDOR_AXUS - -choice - prompt "Mainboard model" - -config BOARD_AXUS_TC320 - bool "TC320" - -endchoice - -source "src/mainboard/axus/tc320/Kconfig" - -config MAINBOARD_VENDOR - string - default "AXUS" - -endif # VENDOR_AXUS diff --git a/src/mainboard/axus/tc320/Kconfig b/src/mainboard/axus/tc320/Kconfig deleted file mode 100644 index 97c33aa..0000000 --- a/src/mainboard/axus/tc320/Kconfig +++ /dev/null @@ -1,46 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -if BOARD_AXUS_TC320 - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_AMD_GEODE_GX1 - select NORTHBRIDGE_AMD_GX1 - select SOUTHBRIDGE_AMD_CS5530 - select SUPERIO_NSC_PC97317 - select ROMCC - select HAVE_PIRQ_TABLE - select PIRQ_ROUTE - select UDELAY_TSC - select BOARD_ROMSIZE_KB_256 - -config MAINBOARD_DIR - string - default axus/tc320 - -config MAINBOARD_PART_NUMBER - string - default "TC320" - -# Soldered NIC, internal USB, no real PCI slots. -config IRQ_SLOT_COUNT - int - default 2 - -endif # BOARD_AXUS_TC320 diff --git a/src/mainboard/axus/tc320/board_info.txt b/src/mainboard/axus/tc320/board_info.txt deleted file mode 100644 index 005c28d..0000000 --- a/src/mainboard/axus/tc320/board_info.txt +++ /dev/null @@ -1,2 +0,0 @@ -Category: settop -Board URL: http://www.keyton.co.jp/products/UAXT/TC-320.html diff --git a/src/mainboard/axus/tc320/devicetree.cb b/src/mainboard/axus/tc320/devicetree.cb deleted file mode 100644 index 970f71f..0000000 --- a/src/mainboard/axus/tc320/devicetree.cb +++ /dev/null @@ -1,55 +0,0 @@ -chip northbridge/amd/gx1 # Northbridge - device domain 0 on # PCI domain - device pci 0.0 on end # Host bridge - chip southbridge/amd/cs5530 # Southbridge - device pci 12.0 on # ISA bridge - chip superio/nsc/pc97317 # Super I/O - device pnp 2e.0 on # PS/2 keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - end - device pnp 2e.1 on # PS/2 mouse - irq 0x70 = 12 - end - device pnp 2e.2 on # RTC, advanced power control (APC) - io 0x60 = 0x70 - irq 0x70 = 8 - end - device pnp 2e.3 off # Floppy (N/A on this board) - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.4 on # Parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 2e.5 off # COM2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.6 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.7 on # GPIO - io 0x60 = 0xe0 - end - device pnp 2e.8 on # Power management - io 0x60 = 0xe800 - end - end - end - device pci 12.1 off end # SMI - device pci 12.2 off end # IDE - device pci 12.3 on end # Audio - device pci 12.4 on end # VGA (onboard) - device pci 13.0 on end # USB - # register "ide0_enable" = "1" - # register "ide1_enable" = "1" - end - end - chip cpu/amd/geode_gx1 # CPU - end -end diff --git a/src/mainboard/axus/tc320/irq_tables.c b/src/mainboard/axus/tc320/irq_tables.c deleted file mode 100644 index 71cf2e1..0000000 --- a/src/mainboard/axus/tc320/irq_tables.c +++ /dev/null @@ -1,122 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Juergen Beisert juergen@kreuzholzen.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/** - * @file - * Interrupt routing description for the AXUS TC320 board. - * It was not possible to read back the PIRQ table. There was no BIOS to ask - * for it, only a bootloader for an embedded OS. - * But with the method described here: - * http://coreboot.org/Creating_Valid_IRQ_Tables - * it was possible to detect the physical IRQ routing on this board. - * - * This is the physical routing on this board: - * - * IRQ 5530 USB Network - * controller northbridge device device - * 00.13.0 00.0e.00 - * -------------------------------------------- - * 11 INTA# INTA# n.c. - * 15 INTB# n.c. INTA# - * INTC# n.c. n.c. - * INTD# n.c. n.c. - */ - -#include <arch/pirq_routing.h> - -#define INT_A 0x01 -#define INT_B 0x02 -#define INT_C 0x03 -#define INT_D 0x04 - -/* - * The USB controller should be connected to IRQ11, - * the network controller should be connected to IRQ15. - */ - -#define IRQ_BITMAP_LINK0 0x0800 -#define IRQ_BITMAP_LINK1 0x8000 -#define IRQ_BITMAP_LINK2 0x0000 -#define IRQ_BITMAP_LINK3 0x0000 - -/** Reserved interrupt channels for exclusive PCI usage. */ -#define IRQ_DEVOTED_TO_PCI (IRQ_BITMAP_LINK0 | IRQ_BITMAP_LINK1) - -/** - * Routing description. - * Documentation at: http://www.microsoft.com/whdc/archive/pciirq.mspx - */ -static const struct irq_routing_table intel_irq_routing_table = { - .signature = PIRQ_SIGNATURE, /* PIRQ signature */ - .version = PIRQ_VERSION, /* PIRQ version */ - .size = 32 + 16 * CONFIG_IRQ_SLOT_COUNT,/* Max. CONFIG_IRQ_SLOT_COUNT devices */ - .rtr_bus = 0x00, /* Interrupt router bus */ - .rtr_devfn = (0x12 << 3) | 0x0, /* Interrupt router device */ - .exclusive_irqs = IRQ_DEVOTED_TO_PCI, /* IRQs devoted to PCI */ - .rtr_vendor = 0x1078, /* Vendor */ - .rtr_device = 0x0100, /* Device */ - .miniport_data = 0, /* Miniport data */ - .checksum = 0xe3, /* Checksum */ - .slots = { - /* - * Definition for "slot#1". There is no real slot, - * the USB device is embedded... - */ - [0] = { - .bus = 0x00, - .devfn = (0x13 << 3) | 0x0, - .irq = { - /* Link Bitmap */ - [0] = { INT_A, IRQ_BITMAP_LINK0 }, - [1] = { INT_B, IRQ_BITMAP_LINK1 }, - [2] = { INT_C, IRQ_BITMAP_LINK2 }, - [3] = { INT_D, IRQ_BITMAP_LINK3 }, - }, - .slot = 0x0, - }, - /* - * Definition for "slot#2". There is no real slot, - * the network device is soldered... - */ - [1] = { - .bus = 0x00, - .devfn = (0x0e << 3) | 0x0, - .irq = { - /* Link Bitmap */ - [0] = { INT_B, IRQ_BITMAP_LINK1 }, - [1] = { INT_C, IRQ_BITMAP_LINK2 }, - [2] = { INT_D, IRQ_BITMAP_LINK3 }, - [3] = { INT_A, IRQ_BITMAP_LINK0 }, - }, - .slot = 0x0, - } - } -}; - -/** - * Copy the IRQ routing table to memory. - * - * @param[in] addr Destination address (between 0xF0000...0x100000). - * @return TODO. - */ -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/axus/tc320/romstage.c b/src/mainboard/axus/tc320/romstage.c deleted file mode 100644 index 15362e3..0000000 --- a/src/mainboard/axus/tc320/romstage.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Juergen Beisert juergen@kreuzholzen.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <arch/hlt.h> -#include <console/console.h> -#include "northbridge/amd/gx1/raminit.c" -#include "superio/nsc/pc97317/early_serial.c" -#include "cpu/x86/bist.h" -#include "southbridge/amd/cs5530/enable_rom.c" - -#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1) - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - report_bist_failure(bist); - cs5530_enable_rom(); - sdram_init(); -} diff --git a/src/mainboard/bcom/Kconfig b/src/mainboard/bcom/Kconfig index 60945d6..5c7e41b 100644 --- a/src/mainboard/bcom/Kconfig +++ b/src/mainboard/bcom/Kconfig @@ -21,14 +21,11 @@ if VENDOR_BCOM choice prompt "Mainboard model"
-config BOARD_BCOM_WINNET100 - bool "WinNET100" config BOARD_BCOM_WINNETP680 bool "WinNET P680"
endchoice
-source "src/mainboard/bcom/winnet100/Kconfig" source "src/mainboard/bcom/winnetp680/Kconfig"
config MAINBOARD_VENDOR diff --git a/src/mainboard/bcom/winnet100/Kconfig b/src/mainboard/bcom/winnet100/Kconfig deleted file mode 100644 index 503c92b..0000000 --- a/src/mainboard/bcom/winnet100/Kconfig +++ /dev/null @@ -1,46 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -if BOARD_BCOM_WINNET100 - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_AMD_GEODE_GX1 - select NORTHBRIDGE_AMD_GX1 - select SOUTHBRIDGE_AMD_CS5530 - select SUPERIO_NSC_PC97317 - select ROMCC - select HAVE_PIRQ_TABLE - select PIRQ_ROUTE - select UDELAY_TSC - select BOARD_ROMSIZE_KB_256 - -config MAINBOARD_DIR - string - default bcom/winnet100 - -config MAINBOARD_PART_NUMBER - string - default "WinNET100" - -# Soldered NIC, internal USB, no real PCI slots. -config IRQ_SLOT_COUNT - int - default 2 - -endif # BOARD_BCOM_WINNET100 diff --git a/src/mainboard/bcom/winnet100/board_info.txt b/src/mainboard/bcom/winnet100/board_info.txt deleted file mode 100644 index 85e561a..0000000 --- a/src/mainboard/bcom/winnet100/board_info.txt +++ /dev/null @@ -1,4 +0,0 @@ -Category: settop -Board name: WinNET100 (IGEL-316) -Board URL: http://web.archive.org/web/20031207003521/http://www.igel.co.za/igel_316_com... -Flashrom support: y diff --git a/src/mainboard/bcom/winnet100/devicetree.cb b/src/mainboard/bcom/winnet100/devicetree.cb deleted file mode 100644 index 61a71e6..0000000 --- a/src/mainboard/bcom/winnet100/devicetree.cb +++ /dev/null @@ -1,56 +0,0 @@ -chip northbridge/amd/gx1 # Northbridge - device domain 0 on # PCI domain - device pci 0.0 on end # Host bridge - chip southbridge/amd/cs5530 # Southbridge - device pci 0f.0 on end # Ethernet (onboard) - device pci 12.0 on # ISA bridge - chip superio/nsc/pc97317 # Super I/O - device pnp 2e.0 on # PS/2 keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - end - device pnp 2e.1 on # PS/2 mouse - irq 0x70 = 12 - end - device pnp 2e.2 on # RTC, Advanced power control (APC) - io 0x60 = 0x70 - irq 0x70 = 8 - end - device pnp 2e.3 off # Floppy (N/A on this board) - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.4 on # Parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 2e.5 on # COM2 (used for smartcard reader) - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.6 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.7 on # GPIO - io 0x60 = 0xe0 - end - device pnp 2e.8 on # Power management - io 0x60 = 0xe8 - end - end - end - device pci 12.1 off end # SMI - device pci 12.2 on end # IDE - device pci 12.3 on end # Audio - device pci 12.4 on end # VGA (onboard) - device pci 13.0 on end # USB - register "ide0_enable" = "1" - register "ide1_enable" = "0" # Not available/needed on this board - end - end - chip cpu/amd/geode_gx1 # CPU - end -end diff --git a/src/mainboard/bcom/winnet100/irq_tables.c b/src/mainboard/bcom/winnet100/irq_tables.c deleted file mode 100644 index 8d9e157..0000000 --- a/src/mainboard/bcom/winnet100/irq_tables.c +++ /dev/null @@ -1,121 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Juergen Beisert juergen@kreuzholzen.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -/** - * @file - * Interrupt routing description for BCOM's Winnet100 board. - * It was not possible to read back the pirq-Table. In the 0xF segment was - * no string like $PIRQ... - * But the already running 2.4.21 kernel provides eth0 IRQ15 and USB IRQ 11. - * The Realtek was device 0.f.0, the USB 0.13.0. - * - * This is the physical routing on this board: - * - * 5530 USB Network - * northbridge device device - * 00.13.0 00.0f.00 - * ------------------------------------ - * INTA# INTA# n.c. - * INTB# n.c. n.c. - * INTC# n.c. INTA# - * INTD# n.c. n.c. - */ - -#include <arch/pirq_routing.h> - -#define INT_A 0x01 -#define INT_B 0x02 -#define INT_C 0x03 -#define INT_D 0x04 - -/* - * The USB controller should be connected to IRQ11, - * the network controller should be connected to IRQ15. - */ -#define IRQ_BITMAP_LINK0 0x0800 -#define IRQ_BITMAP_LINK1 0x0400 -#define IRQ_BITMAP_LINK2 0x8000 -#define IRQ_BITMAP_LINK3 0x0200 - -/** Reserved interrupt channels for exclusive PCI usage. */ -#define IRQ_DEVOTED_TO_PCI (IRQ_BITMAP_LINK0 | IRQ_BITMAP_LINK2) - -/** - * Routing description. - * Documentation at: http://www.microsoft.com/whdc/archive/pciirq.mspx - */ -static const struct irq_routing_table intel_irq_routing_table = { - .signature = PIRQ_SIGNATURE, /* PIRQ signature */ - .version = PIRQ_VERSION, /* PIRQ version */ - .size = 32 +16 * CONFIG_IRQ_SLOT_COUNT,/* Max. CONFIG_IRQ_SLOT_COUNT devices */ - .rtr_bus = 0x00, /* Interrupt router bus */ - .rtr_devfn = (0x12 << 3) | 0x0, /* Interrupt router device */ - .exclusive_irqs = IRQ_DEVOTED_TO_PCI, /* IRQs devoted to PCI */ - .rtr_vendor = 0x1078, /* Vendor */ - .rtr_device = 0x0100, /* Device */ - .miniport_data = 0, /* Miniport data */ - .checksum = 0xbf + 16, /* Checksum */ - .slots = { - /* - * Definition for "slot#1". There is no real slot, - * the USB device is embedded... - */ - [0] = { - .bus = 0x00, - .devfn = (0x13 << 3) | 0x0, - .irq = { - /* Link Bitmap */ - [0] = { INT_A, IRQ_BITMAP_LINK0 }, - [1] = { INT_B, IRQ_BITMAP_LINK1 }, - [2] = { INT_C, IRQ_BITMAP_LINK2 }, - [3] = { INT_D, IRQ_BITMAP_LINK3 }, - }, - .slot = 0x0, - }, - - /* - * Definition for "slot#3". There is no real slot, - * the network device is soldered... - */ - [1] = { - .bus = 0x00, - .devfn = (0x0f << 3) | 0x0, - .irq = { - /* Link Bitmap */ - [0] = { INT_C, IRQ_BITMAP_LINK2 }, - [1] = { INT_D, IRQ_BITMAP_LINK3 }, - [2] = { INT_A, IRQ_BITMAP_LINK0 }, - [3] = { INT_B, IRQ_BITMAP_LINK1 }, - }, - .slot = 0x0, - } - } -}; - -/** - * Copy the IRQ routing table to memory. - * - * @param[in] addr Destination address (between 0xF0000...0x100000). - * @return TODO. - */ -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/bcom/winnet100/romstage.c b/src/mainboard/bcom/winnet100/romstage.c deleted file mode 100644 index 15362e3..0000000 --- a/src/mainboard/bcom/winnet100/romstage.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Juergen Beisert juergen@kreuzholzen.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <arch/hlt.h> -#include <console/console.h> -#include "northbridge/amd/gx1/raminit.c" -#include "superio/nsc/pc97317/early_serial.c" -#include "cpu/x86/bist.h" -#include "southbridge/amd/cs5530/enable_rom.c" - -#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1) - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - report_bist_failure(bist); - cs5530_enable_rom(); - sdram_init(); -} diff --git a/src/mainboard/bifferos/Kconfig b/src/mainboard/bifferos/Kconfig deleted file mode 100644 index de6fb5c..0000000 --- a/src/mainboard/bifferos/Kconfig +++ /dev/null @@ -1,36 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## - -if VENDOR_BIFFEROS - -choice - prompt "Mainboard model" - -config BOARD_BIFFEROS_BIFFERBOARD - bool "Bifferboard" - -endchoice - -source "src/mainboard/bifferos/bifferboard/Kconfig" - -config MAINBOARD_VENDOR - string - default "Bifferos" - -endif # VENDOR_BIFFEROS diff --git a/src/mainboard/bifferos/bifferboard/Kconfig b/src/mainboard/bifferos/bifferboard/Kconfig deleted file mode 100644 index 9d00f5e..0000000 --- a/src/mainboard/bifferos/bifferboard/Kconfig +++ /dev/null @@ -1,21 +0,0 @@ -if BOARD_BIFFEROS_BIFFERBOARD - -config BOARD_SPECIFIC_OPTIONS - def_bool y - select ARCH_BOOTBLOCK_X86_32 - select ARCH_ROMSTAGE_X86_32 - select ARCH_RAMSTAGE_X86_32 - select ROMCC - select BOARD_ROMSIZE_KB_128 - select NORTHBRIDGE_RDC_R8610 - select SOUTHBRIDGE_RDC_R8610 - -config MAINBOARD_DIR - string - default bifferos/bifferboard - -config MAINBOARD_PART_NUMBER - string - default "Bifferboard" - -endif # BOARD_BIFFEROS_BIFFERBOARD diff --git a/src/mainboard/bifferos/bifferboard/board_info.txt b/src/mainboard/bifferos/bifferboard/board_info.txt deleted file mode 100644 index 7680e6f..0000000 --- a/src/mainboard/bifferos/bifferboard/board_info.txt +++ /dev/null @@ -1 +0,0 @@ -Category: half diff --git a/src/mainboard/bifferos/bifferboard/devicetree.cb b/src/mainboard/bifferos/bifferboard/devicetree.cb deleted file mode 100644 index 09dde33..0000000 --- a/src/mainboard/bifferos/bifferboard/devicetree.cb +++ /dev/null @@ -1,8 +0,0 @@ -chip northbridge/rdc/r8610 - device domain 0 on - device pci 0.0 on end - chip southbridge/rdc/r8610 # Southbridge - device pci 7.0 on end # SB - end - end -end diff --git a/src/mainboard/bifferos/bifferboard/romstage.c b/src/mainboard/bifferos/bifferboard/romstage.c deleted file mode 100644 index dd2553e..0000000 --- a/src/mainboard/bifferos/bifferboard/romstage.c +++ /dev/null @@ -1,62 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2012 Rudolf Marek r.marek@assembler.cz - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include <device/pci_def.h> -#include <device/pci_ids.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <arch/hlt.h> -#include <pc80/mc146818rtc.h> -#include <console/console.h> -#include <cpu/x86/cache.h> - -static void main(void) -{ - uint32_t tmp; - post_code(0x05); - - /* Set timer1 to pulse generator 15us for memory refresh */ - outb(0x54, 0x43); - outb(0x12, 0x41); - - /* CPU setup, romcc pukes on invd() */ - asm volatile ("invd"); - enable_cache(); - - /* Set serial base */ - pci_write_config32(PCI_DEV(0,7,0), 0x54, 0x3f8); - /* serial IRQ disable, LPC disable, COM2 goes to LPC, internal UART for COM1 */ - pci_write_config32(PCI_DEV(0,7,0), 0x50, 0x84101012); - - console_init(); - - /* memory init */ - pci_write_config32(PCI_DEV(0,0,0), 0x68, 0x6c99f); - pci_write_config32(PCI_DEV(0,0,0), 0x6c, 0x800451); - pci_write_config32(PCI_DEV(0,0,0), 0x70, 0x4000003); - - /* memory phase/buffer strength for read and writes */ - tmp = pci_read_config32(PCI_DEV(0,0,0), 0x64); - tmp &= 0x0FF00FFFF; - tmp |= 0x790000; - pci_write_config32(PCI_DEV(0,0,0), 0x64, tmp); - /* Route Cseg, Dseg, Eseg and Fseg to RAM */ - pci_write_config32(PCI_DEV(0,0,0), 0x84, 0x3ffffff0); -} diff --git a/src/mainboard/digitallogic/Kconfig b/src/mainboard/digitallogic/Kconfig index 9f490b0..8aff47c 100644 --- a/src/mainboard/digitallogic/Kconfig +++ b/src/mainboard/digitallogic/Kconfig @@ -5,15 +5,12 @@ choice
config BOARD_DIGITALLOGIC_ADL855PC bool "smartModule855" -config BOARD_DIGITALLOGIC_MSM586SEG - bool "MSM586SEG" config BOARD_DIGITALLOGIC_MSM800SEV bool "MSM800SEV"
endchoice
source "src/mainboard/digitallogic/adl855pc/Kconfig" -source "src/mainboard/digitallogic/msm586seg/Kconfig" source "src/mainboard/digitallogic/msm800sev/Kconfig"
config MAINBOARD_VENDOR diff --git a/src/mainboard/digitallogic/msm586seg/Kconfig b/src/mainboard/digitallogic/msm586seg/Kconfig deleted file mode 100644 index 4cd6f11..0000000 --- a/src/mainboard/digitallogic/msm586seg/Kconfig +++ /dev/null @@ -1,23 +0,0 @@ -if BOARD_DIGITALLOGIC_MSM586SEG - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_AMD_SC520 - select HAVE_PIRQ_TABLE - select HAVE_OPTION_TABLE - select BOARD_ROMSIZE_KB_512 - select ROMCC - -config MAINBOARD_DIR - string - default digitallogic/msm586seg - -config MAINBOARD_PART_NUMBER - string - default "MSM586SEG" - -config IRQ_SLOT_COUNT - int - default 2 - -endif # BOARD_DIGITALLOGIC_MSM586SEG diff --git a/src/mainboard/digitallogic/msm586seg/board_info.txt b/src/mainboard/digitallogic/msm586seg/board_info.txt deleted file mode 100644 index 90fda6d..0000000 --- a/src/mainboard/digitallogic/msm586seg/board_info.txt +++ /dev/null @@ -1,2 +0,0 @@ -Category: half -Board URL: http://www.digitallogic.ch/english/products/datasheets/ms_pc104_detail.asp?i... diff --git a/src/mainboard/digitallogic/msm586seg/cmos.layout b/src/mainboard/digitallogic/msm586seg/cmos.layout deleted file mode 100644 index 9050c3d..0000000 --- a/src/mainboard/digitallogic/msm586seg/cmos.layout +++ /dev/null @@ -1,72 +0,0 @@ -entries - -#start-bit length config config-ID name -#0 8 r 0 seconds -#8 8 r 0 alarm_seconds -#16 8 r 0 minutes -#24 8 r 0 alarm_minutes -#32 8 r 0 hours -#40 8 r 0 alarm_hours -#48 8 r 0 day_of_week -#56 8 r 0 day_of_month -#64 8 r 0 month -#72 8 r 0 year -#80 4 r 0 rate_select -#84 3 r 0 REF_Clock -#87 1 r 0 UIP -#88 1 r 0 auto_switch_DST -#89 1 r 0 24_hour_mode -#90 1 r 0 binary_values_enable -#91 1 r 0 square-wave_out_enable -#92 1 r 0 update_finished_enable -#93 1 r 0 alarm_interrupt_enable -#94 1 r 0 periodic_interrupt_enable -#95 1 r 0 disable_clock_updates -#96 288 r 0 temporary_filler -0 384 r 0 reserved_memory -384 1 e 4 boot_option -385 1 e 4 last_boot -386 1 e 1 ECC_memory -388 4 r 0 reboot_bits -392 3 e 5 baud_rate -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -416 4 e 7 boot_first -420 4 e 7 boot_second -424 4 e 7 boot_third -428 4 h 0 boot_index -432 8 h 0 boot_countdown -1008 16 h 0 check_sum - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -5 0 115200 -5 1 57600 -5 2 38400 -5 3 19200 -5 4 9600 -5 5 4800 -5 6 2400 -5 7 1200 -6 6 Notice -6 7 Info -6 8 Debug -6 9 Spew -7 0 Network -7 1 HDD -7 2 Floppy -7 8 Fallback_Network -7 9 Fallback_HDD -7 10 Fallback_Floppy -#7 3 ROM - -checksums - -checksum 392 1007 1008 diff --git a/src/mainboard/digitallogic/msm586seg/devicetree.cb b/src/mainboard/digitallogic/msm586seg/devicetree.cb deleted file mode 100644 index e43ebff..0000000 --- a/src/mainboard/digitallogic/msm586seg/devicetree.cb +++ /dev/null @@ -1,7 +0,0 @@ -chip cpu/amd/sc520 - device domain 0 on - device pci 0.0 on end - device pci 12.0 on end # enet - device pci 14.0 on end # 69000 - end -end diff --git a/src/mainboard/digitallogic/msm586seg/irq_tables.c b/src/mainboard/digitallogic/msm586seg/irq_tables.c deleted file mode 100644 index 15dcddd..0000000 --- a/src/mainboard/digitallogic/msm586seg/irq_tables.c +++ /dev/null @@ -1,31 +0,0 @@ -/* This file was generated by getpir.c, do not modify! - (but if you do, please run checkpir on it to verify) - * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up - * - * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM -*/ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, /* u32 signature */ - PIRQ_VERSION, /* u16 version */ - 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */ - 0x00, /* Where the interrupt router lies (bus) */ - (0x00<<3)|0x0, /* Where the interrupt router lies (dev) */ - 0, /* IRQs devoted exclusively to PCI usage */ - 0x8086, /* Vendor */ - 0x122e, /* Device */ - 0, /* Miniport data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x50, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ - { - /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00,(0x12<<3)|0x0, {{0x30, 0x8000}, {0x00, 0x0}, {0x00, 0x0}, {0x00, 0x00}}, 0x0, 0x0}, - {0x00,(0x14<<3)|0x0, {{0x30, 0x8000}, {0x31, 0x0}, {0x32, 0x0}, {0x33, 0x00}}, 0x0, 0x0}, - } -}; -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/digitallogic/msm586seg/mainboard.c b/src/mainboard/digitallogic/msm586seg/mainboard.c deleted file mode 100644 index 0310176..0000000 --- a/src/mainboard/digitallogic/msm586seg/mainboard.c +++ /dev/null @@ -1,133 +0,0 @@ -#include <console/console.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> -#include <cpu/amd/sc520.h> - - -static void irqdump(void) -{ - volatile unsigned char *irq; - void *mmcr; - int i; - int irqlist[] = {0xd00, 0xd02, 0xd03, 0xd04, 0xd08, 0xd0a, - 0xd14, 0xd18, 0xd1a, 0xd1b, 0xd1c, - 0xd20, 0xd21, 0xd22, 0xd28, 0xd29, - 0xd30, 0xd31, 0xd32, 0xd33, - 0xd40, 0xd41, 0xd42, 0xd43,0xd44, 0xd45, 0xd46, - 0xd50, 0xd51, 0xd52, 0xd53,0xd54, 0xd55, 0xd56, 0xd57,0xd58, 0xd59, 0xd5a, - -1}; - mmcr = (void *) 0xfffef000; - - printk(BIOS_ERR, "mmcr is %p\n", mmcr); - for(i = 0; irqlist[i] >= 0; i++) { - irq = mmcr + irqlist[i]; - printk(BIOS_ERR, "0x%x register @%p is 0x%x\n", irqlist[i], irq, *irq); - } - -} - -/* TODO: finish up mmcr struct in sc520.h, and; - - set ADDDECTL (now done in raminit.c in cpu/amd/sc520 -*/ -static void mainboard_enable(struct device *dev) -{ - //volatile struct mmcrpic *pic = MMCRPIC; - volatile struct mmcr *mmcr = MMCRDEFAULT; - - /* msm586seg has this register set to a weird value. - * follow the board, not the manual! - */ - - /* currently, nothing in the device to use, so ignore it. */ - printk(BIOS_ERR, "digital logic msm586 seg ENTER %s\n", __func__); - - - /* from fuctory bios */ - /* NOTE: the following interrupt settings made interrupts work - * for hard drive, and serial, but not for ethernet - */ - /* just do what they say and nobody gets hurt. */ - mmcr->pic.pcicr = 0 ; // M_GINT_MODE | M_S1_MODE | M_S2_MODE; - /* all ints to level */ - mmcr->pic.mpicmode = 0; - mmcr->pic.sl1picmode = 0; - mmcr->pic.sl2picmode = 0x80; - - mmcr->pic.intpinpol = 0; - - mmcr->pic.pit0map = 1; - mmcr->pic.uart1map = 0xc; - mmcr->pic.uart2map = 0xb; - mmcr->pic.rtcmap = 3; - mmcr->pic.ferrmap = 8; - mmcr->pic.gp0imap = 6; - mmcr->pic.gp1imap = 2; - mmcr->pic.gp2imap = 7; - mmcr->pic.gp6imap = 0x15; - mmcr->pic.gp7imap = 0x16; - mmcr->pic.gp10imap = 0x9; - mmcr->pic.gp9imap = 0x4; - - irqdump(); - printk(BIOS_ERR, "uart 1 ctl is 0x%x\n", *(unsigned char *) 0xfffefcc0); - - printk(BIOS_ERR, "0xc20 ctl is 0x%x\n", *(unsigned short *) 0xfffefc20); - printk(BIOS_ERR, "0xc22 0x%x\n", *(unsigned short *) 0xfffefc22); - - /* The following block has NOT proven sufficient to get - * the VGA hardware to talk to us - */ - /* let's set some mmcr stuff per the BIOS settings */ - mmcr->dbctl.dbctl = 0x10; - mmcr->sysarb.ctl = 6; - mmcr->sysarb.menb = 0xf; - mmcr->sysarb.prictl = 0xc0000f0f; - /* this is bios setting, depends on sysarb above */ - mmcr->hostbridge.ctl = 0x108; - printk(BIOS_ERR, "digital logic msm586 seg EXIT %s\n", __func__); - - /* pio */ - mmcr->pio.data31_16 = 0xffbf; - - /* pci stuff */ - mmcr->pic.pciintamap = 0xa; - - /* END block where vga hardware still will not talk to us */ - /* all we get from VGA I/O addresses are ffff etc. - */ - mmcr->sysmap.adddecctl = 0x10; - - /* VGA now talks to us, so this adddecctl was the trick. - * still no interrupts from enet. - * Let's try fixing the piodata stuff, as there may be - * some wire there not documented. - */ - mmcr->pio.data31_16 = 0xffbf; - /* also, our sl?picmode needs to match fuctory bios */ - mmcr->pic.sl1picmode = 0x80; - mmcr->pic.sl2picmode = 0x0; - /* and, finally, they do set gp5imap and we don't. - */ - mmcr->pic.gp5imap = 0xd; - /* remaining problem: almost certainly, the irq table is bogus - * NO SHOCK as it came from fuctory bios. - * but let's try these 4 changes for now and see what shakes. - */ - /* still not interrupts. */ - /* their IRQ table is wrong. Just hardwire it */ - { - unsigned char pciints[4] = {15, 15, 15, 15}; - pci_assign_irqs(0, 12, pciints); - } - /* the assigned failed but we just noticed -- there is no - * dma mapping, and selftest on e100 requires that dma work - */ - /* follow fuctory here */ - mmcr->dmacontrol.extchanmapa = 0x3210; -} - -struct chip_operations mainboard_ops = { - .enable_dev = mainboard_enable, -}; diff --git a/src/mainboard/digitallogic/msm586seg/romstage.c b/src/mainboard/digitallogic/msm586seg/romstage.c deleted file mode 100644 index ab944a4..0000000 --- a/src/mainboard/digitallogic/msm586seg/romstage.c +++ /dev/null @@ -1,240 +0,0 @@ -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <arch/hlt.h> -#include <pc80/mc146818rtc.h> -#include <console/console.h> -#include "cpu/x86/bist.h" - -void setup_pars(void) -{ - volatile unsigned long *par; - /* as per the book: */ - /* PAR register setup */ - /* set up the PAR registers as they are on the MSM586SEG */ - par = (unsigned long *) 0xfffef088; - - /* NOTE: move this to mainboard.c ASAP */ - *par++ = 0x607c00a0; /*PAR0: PCI:Base 0xa0000; size 0x1f000:*/ - *par++ = 0x480400d8; /*PAR1: GP BUS MEM:CS2:Base 0xd8, size 0x4:*/ - *par++ = 0x340100ea; /*PAR2: GP BUS IO:CS5:Base 0xea, size 0x1:*/ - *par++ = 0x380701f0; /*PAR3: GP BUS IO:CS6:Base 0x1f0, size 0x7:*/ - *par++ = 0x3c0003f6; /*PAR4: GP BUS IO:CS7:Base 0x3f6, size 0x0:*/ - *par++ = 0x35ff0400; /*PAR5: GP BUS IO:CS5:Base 0x400, size 0xff:*/ - *par++ = 0x35ff0600; /*PAR6: GP BUS IO:CS5:Base 0x600, size 0xff:*/ - *par++ = 0x35ff0800; /*PAR7: GP BUS IO:CS5:Base 0x800, size 0xff:*/ - *par++ = 0x35ff0a00; /*PAR8: GP BUS IO:CS5:Base 0xa00, size 0xff:*/ - *par++ = 0x35ff0e00; /*PAR9: GP BUS IO:CS5:Base 0xe00, size 0xff:*/ - *par++ = 0x34fb0104; /*PAR10: GP BUS IO:CS5:Base 0x104, size 0xfb:*/ - *par++ = 0x35af0200; /*PAR11: GP BUS IO:CS5:Base 0x200, size 0xaf:*/ - *par++ = 0x341f03e0; /*PAR12: GP BUS IO:CS5:Base 0x3e0, size 0x1f:*/ - *par++ = 0xe41c00c0; /*PAR13: SDRAM:code:cache:nowrite:Base 0xc0000, size 0x7000:*/ - *par++ = 0x545c00c8; /*PAR14: GP BUS MEM:CS5:Base 0xc8, size 0x5c:*/ - *par++ = 0x8a020200; /*PAR15: BOOTCS:code:nocache:write:Base 0x2000000, size 0x80000:*/ -} - -#include "cpu/amd/sc520/raminit.c" - -struct mem_controller { - int i; -}; - -static int spd_read_byte(unsigned device, unsigned address) { } - -static inline void dumpmem(void){ - int i, j; - unsigned char *l; - unsigned char c; - - for(i = 0x4000; i < 0x5000; i += 16) { - print_err_hex32(i); print_err(":"); - for(j = 0; j < 16; j++) { - l = (unsigned char *)i + j; - c = *l; - print_err_hex8(c); - print_err(" "); - } - print_err("\n"); - } -} - -static inline void irqinit(void){ - volatile unsigned char *cp; -#if 0 -/* these values taken from the msm board itself. - * and they cause the board to not even come out of calibrating_delay_loop - * if you can believe it. Our problem right now is no IDE or serial interrupts - * So we'll try to put interrupts in, one at a time. IDE first. - */ - cp = (volatile unsigned char *) 0xfffefd00; - *cp = 0x11; - cp = (volatile unsigned char *) 0xfffefd02; - *cp = 0x02; - cp = (volatile unsigned char *) 0xfffefd03; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd04; - *cp = 0xf7; - cp = (volatile unsigned char *) 0xfffefd08; - *cp = 0xf7; - cp = (volatile unsigned char *) 0xfffefd0a; - *cp = 0x8b; - cp = (volatile unsigned char *) 0xfffefd10; - *cp = 0x18; - cp = (volatile unsigned char *) 0xfffefd14; - *cp = 0x09; - cp = (volatile unsigned char *) 0xfffefd18; - *cp = 0x88; - cp = (volatile unsigned char *) 0xfffefd1a; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd1b; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd1c; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd20; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd21; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd22; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd28; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd29; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd30; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd31; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd32; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd33; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd40; - *cp = 0x10; - cp = (volatile unsigned char *) 0xfffefd41; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd42; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd43; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd44; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd45; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd46; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd50; - *cp = 0x37; - cp = (volatile unsigned char *) 0xfffefd51; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd52; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd53; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd54; - *cp = 0x37; - cp = (volatile unsigned char *) 0xfffefd55; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd56; - *cp = 0x37; - cp = (volatile unsigned char *) 0xfffefd57; - *cp = 0x00; - cp = (volatile unsigned char *) 0xfffefd58; - *cp = 0xff; - cp = (volatile unsigned char *) 0xfffefd59; - *cp = 0xff; - cp = (volatile unsigned char *) 0xfffefd5a; - *cp = 0xff; -#endif -#if 0 - /* this fails too */ - /* IDE only ... */ - cp = (volatile unsigned char *) 0xfffefd56; - *cp = 0xe; -#endif -} - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - volatile int i; - for(i = 0; i < 100; i++) - ; - - setupsc520(); - irqinit(); - console_init(); - for(i = 0; i < 100; i++) - print_err("fill usart\n"); - // while(1) - print_err("HI THERE!\n"); - // sizemem(); - staticmem(); - -/* Void warranty when label is removed. */ -dummy_romcc_workaround_label: - do { } while (0); - - print_err("c60 is "); print_err_hex16(*(unsigned short *)0xfffefc60); - print_err("\n"); - - // while(1) - print_err("STATIC MEM DONE\n"); - post_code(0xee); - print_err("loop forever ...\n"); - -#if 0 - - /* clear memory 1meg */ - __asm__ volatile( - "1: \n\t" - "movl %0, %%fs:(%1)\n\t" - "addl $4,%1\n\t" - "subl $4,%2\n\t" - "jnz 1b\n\t" - : - : "a" (0), "D" (0), "c" (1024*1024) - ); - - -#endif - -#if 0 - dump_pci_devices(); -#endif -#if 0 - dump_pci_device(PCI_DEV(0, 0, 0)); -#endif - -#if 1 - { - volatile unsigned char *src = (unsigned char *) 0x2000000 + 0x60000; - volatile unsigned char *dst = (unsigned char *) 0x4000; - for(i = 0; i < 0x20000; i++) { - /* - print_err("Set dst "); print_err_hex32((unsigned long) dst); - print_err(" to "); print_err_hex32(*src); print_err("\n"); - */ - *dst = *src; - //print_err(" dst is now "); print_err_hex32(*dst); print_err("\n"); - dst++, src++; - post_code(i & 0xff); - } - } - dumpmem(); - post_code(0x00); - - print_err("loop forever\n"); - post_code(0xdd); - __asm__ volatile( - "movl %0, %%edi\n\t" - "jmp *%%edi\n\t" - : - : "a" (0x4000) - ); - - print_err("Oh dear, I'm afraid it didn't work...\n"); - - while(1); -#endif -} diff --git a/src/mainboard/technologic/Kconfig b/src/mainboard/technologic/Kconfig deleted file mode 100644 index 792dc5e..0000000 --- a/src/mainboard/technologic/Kconfig +++ /dev/null @@ -1,17 +0,0 @@ -if VENDOR_TECHNOLOGIC - -choice - prompt "Mainboard model" - -config BOARD_TECHNOLOGIC_TS5300 - bool "TS-5300" - -endchoice - -source "src/mainboard/technologic/ts5300/Kconfig" - -config MAINBOARD_VENDOR - string - default "Technologic" - -endif # VENDOR_TECHNOLOGIC diff --git a/src/mainboard/technologic/ts5300/Kconfig b/src/mainboard/technologic/ts5300/Kconfig deleted file mode 100644 index 0006fd7..0000000 --- a/src/mainboard/technologic/ts5300/Kconfig +++ /dev/null @@ -1,23 +0,0 @@ -if BOARD_TECHNOLOGIC_TS5300 - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_AMD_SC520 - select ROMCC - select HAVE_OPTION_TABLE - select HAVE_PIRQ_TABLE - select BOARD_ROMSIZE_KB_1024 - -config MAINBOARD_DIR - string - default technologic/ts5300 - -config MAINBOARD_PART_NUMBER - string - default "TS-5300" - -config IRQ_SLOT_COUNT - int - default 2 - -endif # BOARD_TECHNOLOGIC_TS5300 diff --git a/src/mainboard/technologic/ts5300/board_info.txt b/src/mainboard/technologic/ts5300/board_info.txt deleted file mode 100644 index ef8a731..0000000 --- a/src/mainboard/technologic/ts5300/board_info.txt +++ /dev/null @@ -1,2 +0,0 @@ -Category: half -Board URL: http://www.embeddedarm.com/epc/ts5300-spec-h.html diff --git a/src/mainboard/technologic/ts5300/cmos.layout b/src/mainboard/technologic/ts5300/cmos.layout deleted file mode 100644 index 9050c3d..0000000 --- a/src/mainboard/technologic/ts5300/cmos.layout +++ /dev/null @@ -1,72 +0,0 @@ -entries - -#start-bit length config config-ID name -#0 8 r 0 seconds -#8 8 r 0 alarm_seconds -#16 8 r 0 minutes -#24 8 r 0 alarm_minutes -#32 8 r 0 hours -#40 8 r 0 alarm_hours -#48 8 r 0 day_of_week -#56 8 r 0 day_of_month -#64 8 r 0 month -#72 8 r 0 year -#80 4 r 0 rate_select -#84 3 r 0 REF_Clock -#87 1 r 0 UIP -#88 1 r 0 auto_switch_DST -#89 1 r 0 24_hour_mode -#90 1 r 0 binary_values_enable -#91 1 r 0 square-wave_out_enable -#92 1 r 0 update_finished_enable -#93 1 r 0 alarm_interrupt_enable -#94 1 r 0 periodic_interrupt_enable -#95 1 r 0 disable_clock_updates -#96 288 r 0 temporary_filler -0 384 r 0 reserved_memory -384 1 e 4 boot_option -385 1 e 4 last_boot -386 1 e 1 ECC_memory -388 4 r 0 reboot_bits -392 3 e 5 baud_rate -400 1 e 1 power_on_after_fail -412 4 e 6 debug_level -416 4 e 7 boot_first -420 4 e 7 boot_second -424 4 e 7 boot_third -428 4 h 0 boot_index -432 8 h 0 boot_countdown -1008 16 h 0 check_sum - -enumerations - -#ID value text -1 0 Disable -1 1 Enable -2 0 Enable -2 1 Disable -4 0 Fallback -4 1 Normal -5 0 115200 -5 1 57600 -5 2 38400 -5 3 19200 -5 4 9600 -5 5 4800 -5 6 2400 -5 7 1200 -6 6 Notice -6 7 Info -6 8 Debug -6 9 Spew -7 0 Network -7 1 HDD -7 2 Floppy -7 8 Fallback_Network -7 9 Fallback_HDD -7 10 Fallback_Floppy -#7 3 ROM - -checksums - -checksum 392 1007 1008 diff --git a/src/mainboard/technologic/ts5300/devicetree.cb b/src/mainboard/technologic/ts5300/devicetree.cb deleted file mode 100644 index 6c83e20..0000000 --- a/src/mainboard/technologic/ts5300/devicetree.cb +++ /dev/null @@ -1,6 +0,0 @@ -chip cpu/amd/sc520 - device domain 0 on - device pci 0.0 on end - end - -end diff --git a/src/mainboard/technologic/ts5300/irq_tables.c b/src/mainboard/technologic/ts5300/irq_tables.c deleted file mode 100644 index 15dcddd..0000000 --- a/src/mainboard/technologic/ts5300/irq_tables.c +++ /dev/null @@ -1,31 +0,0 @@ -/* This file was generated by getpir.c, do not modify! - (but if you do, please run checkpir on it to verify) - * Contains the IRQ Routing Table dumped directly from your memory, which BIOS sets up - * - * Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM -*/ - -#include <arch/pirq_routing.h> - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, /* u32 signature */ - PIRQ_VERSION, /* u16 version */ - 32+16*CONFIG_IRQ_SLOT_COUNT, /* there can be total CONFIG_IRQ_SLOT_COUNT devices on the bus */ - 0x00, /* Where the interrupt router lies (bus) */ - (0x00<<3)|0x0, /* Where the interrupt router lies (dev) */ - 0, /* IRQs devoted exclusively to PCI usage */ - 0x8086, /* Vendor */ - 0x122e, /* Device */ - 0, /* Miniport data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x50, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ - { - /* bus, dev|fn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */ - {0x00,(0x12<<3)|0x0, {{0x30, 0x8000}, {0x00, 0x0}, {0x00, 0x0}, {0x00, 0x00}}, 0x0, 0x0}, - {0x00,(0x14<<3)|0x0, {{0x30, 0x8000}, {0x31, 0x0}, {0x32, 0x0}, {0x33, 0x00}}, 0x0, 0x0}, - } -}; -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/technologic/ts5300/mainboard.c b/src/mainboard/technologic/ts5300/mainboard.c deleted file mode 100644 index 20b893e..0000000 --- a/src/mainboard/technologic/ts5300/mainboard.c +++ /dev/null @@ -1,147 +0,0 @@ -#include <console/console.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> -#include <cpu/amd/sc520.h> - - -#if 0 -static void irqdump(void) -{ - volatile unsigned char *irq; - void *mmcr; - - - int i; - int irqlist[] = {0xd00, 0xd02, 0xd03, 0xd04, 0xd08, 0xd0a, - 0xd14, 0xd18, 0xd1a, 0xd1b, 0xd1c, - 0xd20, 0xd21, 0xd22, 0xd28, 0xd29, - 0xd30, 0xd31, 0xd32, 0xd33, - 0xd40, 0xd41, 0xd42, 0xd43,0xd44, 0xd45, 0xd46, - 0xd50, 0xd51, 0xd52, 0xd53,0xd54, 0xd55, 0xd56, 0xd57,0xd58, 0xd59, 0xd5a, - -1}; - mmcr = (void *) 0xfffef000; - - printk(BIOS_ERR, "mmcr is %p\n", mmcr); - for(i = 0; irqlist[i] >= 0; i++) { - irq = mmcr + irqlist[i]; - printk(BIOS_ERR, "0x%x register @%p is 0x%x\n", irqlist[i], irq, *irq); - } - -} -#endif - -/* TODO: finish up mmcr struct in sc520.h, and; - - set ADDDECTL (now done in raminit.c in cpu/amd/sc520 -*/ -static void mainboard_enable(struct device *dev) -{ - volatile struct mmcr *mmcr = MMCRDEFAULT; - - /* currently, nothing in the device to use, so ignore it. */ - printk(BIOS_ERR, "Technologic Systems 5300 ENTER %s\n", __func__); - - /* from fuctory bios */ - /* NOTE: the following interrupt settings made interrupts work - * for hard drive, and serial, but not for ethernet - */ - - printk(BIOS_ERR, "Setting up PIC\n"); - /* just do what they say and nobody gets hurt. */ - mmcr->pic.pcicr = 0 ; - /* all ints to level */ - mmcr->pic.mpicmode = 0; - mmcr->pic.sl1picmode = 0; - mmcr->pic.sl2picmode = 0; - - mmcr->pic.intpinpol = 0x100; - - mmcr->pic.pit0map = 1; - mmcr->pic.uart1map = 0x0c; - mmcr->pic.uart2map = 0x0b; - mmcr->pic.rtcmap = 0x03; - mmcr->pic.ferrmap = 0x00; - mmcr->pic.intpinpol = 0x100; - - mmcr->pic.gp0imap = 0x00; - mmcr->pic.gp1imap = 0x02; - mmcr->pic.gp2imap = 0x07; - mmcr->pic.gp3imap = 0x05; - mmcr->pic.gp4imap = 0x06; - mmcr->pic.gp5imap = 0x0d; - mmcr->pic.gp6imap = 0x15; - mmcr->pic.gp7imap = 0x16; - mmcr->pic.gp8imap = 0x3; - mmcr->pic.gp9imap = 0x4; - mmcr->pic.gp10imap = 0x9; - - // irqdump(); - - printk(BIOS_ERR, "Setting up sysarb\n"); - mmcr->dbctl.dbctl = 0x01; - mmcr->sysarb.ctl = 0x00; - mmcr->sysarb.menb = 0x1f; - mmcr->sysarb.prictl = 0x40000f0f; - - /* this is bios setting, depends on sysarb above */ - mmcr->hostbridge.ctl = 0x0; - mmcr->hostbridge.tgtirqctl = 0x0; - mmcr->hostbridge.tgtirqsta = 0xf00; - mmcr->hostbridge.mstirqctl = 0x0; - mmcr->hostbridge.mstirqsta = 0x708; - - printk(BIOS_ERR, "Setting up pio\n"); - /* pio */ - mmcr->pio.pfs15_0 = 0xffff; - mmcr->pio.pfs31_16 = 0xffff; - mmcr->pio.cspfs = 0xfe; - mmcr->pio.clksel = 0x13; - mmcr->pio.dsctl = 0x200; - mmcr->pio.data15_0 = 0xde04; - mmcr->pio.data31_16 = 0xef9f; - - printk(BIOS_ERR, "Setting up sysmap\n"); - /* system memory map */ - mmcr->sysmap.adddecctl = 0x04; - mmcr->sysmap.wpvsta = 0x8006; - mmcr->sysmap.par[1] = 0x340f0070; - mmcr->sysmap.par[2] = 0x380701f0; - mmcr->sysmap.par[3] = 0x3c0103f6; - mmcr->sysmap.par[4] = 0x2c0f0300; - mmcr->sysmap.par[5] = 0x447c00a0; - mmcr->sysmap.par[6] = 0xe600000c; - mmcr->sysmap.par[7] = 0x300046e8; - mmcr->sysmap.par[8] = 0x500400d0; - mmcr->sysmap.par[9] = 0x281f0140; - mmcr->sysmap.par[13] = 0x8a07c940; - mmcr->sysmap.par[15] = 0xee00400e; - - printk(BIOS_ERR, "Setting up gpctl\n"); - mmcr->gpctl.gpcsrt = 0x01; - mmcr->gpctl.gpcspw = 0x09; - mmcr->gpctl.gpcsoff = 0x01; - mmcr->gpctl.gprdw = 0x07; - mmcr->gpctl.gprdoff = 0x02; - mmcr->gpctl.gpwrw = 0x07; - mmcr->gpctl.gpwroff = 0x02; - - //mmcr->reset.sysinfo = 0xdf; - //mmcr->reset.rescfg = 0x5; - /* their IRQ table is wrong. Just hardwire it */ - //{ - // char pciints[4] = {15, 15, 15, 15}; - // pci_assign_irqs(0, 12, pciints); - //} - /* the assigned failed but we just noticed -- there is no - * dma mapping, and selftest on e100 requires that dma work - */ - mmcr->dmacontrol.extchanmapa = 0xf210; - mmcr->dmacontrol.extchanmapb = 0xffff; - - printk(BIOS_ERR, "TS5300 EXIT %s\n", __func__); -} - -struct chip_operations mainboard_ops = { - .enable_dev = mainboard_enable, -}; diff --git a/src/mainboard/technologic/ts5300/romstage.c b/src/mainboard/technologic/ts5300/romstage.c deleted file mode 100644 index 5d33bae..0000000 --- a/src/mainboard/technologic/ts5300/romstage.c +++ /dev/null @@ -1,169 +0,0 @@ -/* - * TS5300 specific initialization code. - * written by Stefan Reinauer stepan@coresystems.de - * (c) 2006 coresystems GmbH - */ - -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <arch/hlt.h> -#include <pc80/mc146818rtc.h> -#include <console/console.h> -#include "cpu/x86/bist.h" - -#define TS5300_LED_OFF outb((inb(0x77)&0xfe), 0x77) -#define TS5300_LED_ON outb((inb(0x77)|1), 0x77) - -#define TS9500_LED_OFF outb((inb(0x19a)&0xfe), 0x19a) -#define TS9500_LED_ON outb((inb(0x19a)|1), 0x19a) - -/* PAR register setup */ -void setup_pars(void) -{ - volatile unsigned long *par; - par = (unsigned long *) 0xfffef088; - - /* NOTE: Ron says, move this to mainboard.c */ - *par++ = 0x00000000; - *par++ = 0x340f0070; - *par++ = 0x380701f0; - *par++ = 0x3c0103f6; - *par++ = 0x2c0f0300; - *par++ = 0x447c00a0; - *par++ = 0xe600000c; - *par++ = 0x300046e8; - *par++ = 0x500400d0; - *par++ = 0x281f0140; - *par++ = 0x00000000; - *par++ = 0x00000000; - *par++ = 0x00000000; - *par++ = 0x8a07c940; /* Flash setup */ - *par++ = 0x00000000; - *par++ = 0xee00400e; -} - -#include "cpu/amd/sc520/raminit.c" - -static void identify_ts9500(void) -{ - unsigned i, val; - - TS9500_LED_ON; - - print_err("TS-9500 add-on found:\n"); - val=inb(0x19b); - for (i=0; i<8; i++) { - print_err(" DIP"); - print_err_char(i+0x31); - print_err(": "); - if((val&(1<<i))!=0) - print_err("on\n"); - else - print_err("off\n"); - } - print_err("\n"); - - val=inb(0x19a); - - for (i=6; i<8; i++) { - print_err(" JP"); - print_err_char(i+0x30-5); - print_err(": "); - if((val&(1<<i))!=0) - print_err("on\n"); - else - print_err("off\n"); - } - print_err("\n"); - - TS9500_LED_OFF; -} - -static void identify_system(void) -{ - unsigned i,val; - - print_err("Mainboard: "); - val=inb(0x74); - switch(val) { - case 0x50: print_err("TS-5300\n"); break; - case 0x40: print_err("TS-5400\n"); break; - case 0x60: print_err("TS-5500\n"); break; - case 0x20: print_err("TS-5600\n"); break; - case 0x70: print_err("TS-5700\n"); break; - default: print_err("unknown\n"); break; - } - - val=inb(0x75); - print_err(" SRAM option: "); - if((val&1)==0) print_err("not "); - print_err("installed\n"); - - print_err(" RS-485 option: "); - if((val&2)==0) print_err("not "); - print_err("installed\n"); - - val=inb(0x76); - print_err(" Temp. range: "); - if((val&2)==0) print_err("commercial\n"); - else print_err("industrial\n"); - - print_err("\n"); - - val=inb(0x77); - for (i=1; i<8; i++) { - print_err(" JP"); - print_err_char(i+0x30); - print_err(": "); - if((val&(1<<i))!=0) - print_err("on\n"); - else - print_err("off\n"); - } - print_err("\n"); - - /* Detect TS-9500 */ - val=inb(0x19d); - if(val==0x5f) - identify_ts9500(); -} - -static void hard_reset(void) -{ - print_err("Hard reset called.\n"); - while (1) ; -} - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - volatile int i; - unsigned val; - - TS5300_LED_ON; - - // Let the hardware settle a bit. - for(i = 0; i < 100; i++) - ; - - setupsc520(); - console_init(); - - - print_err("Technologic Systems TS5300 - http://www.embeddedx86.com/%5Cn"); - staticmem(); - -/* Void warranty when label is removed. */ -dummy_romcc_workaround_label: - do { } while (0); - - print_err("Memory initialized: 32MB\n"); - -#if 1 - identify_system(); -#endif - - TS5300_LED_OFF; -} diff --git a/src/mainboard/televideo/Kconfig b/src/mainboard/televideo/Kconfig deleted file mode 100644 index aa2f5a1..0000000 --- a/src/mainboard/televideo/Kconfig +++ /dev/null @@ -1,35 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -if VENDOR_TELEVIDEO - -choice - prompt "Mainboard model" - -config BOARD_TELEVIDEO_TC7020 - bool "TC7020" - -endchoice - -source "src/mainboard/televideo/tc7020/Kconfig" - -config MAINBOARD_VENDOR - string - default "TeleVideo" - -endif # VENDOR_TELEVIDEO diff --git a/src/mainboard/televideo/tc7020/Kconfig b/src/mainboard/televideo/tc7020/Kconfig deleted file mode 100644 index 6d77f59..0000000 --- a/src/mainboard/televideo/tc7020/Kconfig +++ /dev/null @@ -1,45 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2009 Uwe Hermann uwe@hermann-uwe.de -## -## This program is free software; you can redistribute it and/or modify -## it under the terms of the GNU General Public License as published by -## the Free Software Foundation; version 2 of the License. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. -## -## You should have received a copy of the GNU General Public License -## along with this program; if not, write to the Free Software -## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -## -if BOARD_TELEVIDEO_TC7020 - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select CPU_AMD_GEODE_GX1 - select NORTHBRIDGE_AMD_GX1 - select SOUTHBRIDGE_AMD_CS5530 - select SUPERIO_NSC_PC97317 - select ROMCC - select HAVE_PIRQ_TABLE - select PIRQ_ROUTE - select UDELAY_TSC - select BOARD_ROMSIZE_KB_256 - -config MAINBOARD_DIR - string - default televideo/tc7020 - -config MAINBOARD_PART_NUMBER - string - default "TC7020" - -config IRQ_SLOT_COUNT - int - default 3 - -endif # BOARD_TELEVIDEO_TC7020 diff --git a/src/mainboard/televideo/tc7020/board_info.txt b/src/mainboard/televideo/tc7020/board_info.txt deleted file mode 100644 index 93e6c5c..0000000 --- a/src/mainboard/televideo/tc7020/board_info.txt +++ /dev/null @@ -1,2 +0,0 @@ -Category: settop -Board URL: http://www.televideo.com/TeleVideo/TC7000_WinCE_Series.htm diff --git a/src/mainboard/televideo/tc7020/devicetree.cb b/src/mainboard/televideo/tc7020/devicetree.cb deleted file mode 100644 index d1fa6bd..0000000 --- a/src/mainboard/televideo/tc7020/devicetree.cb +++ /dev/null @@ -1,57 +0,0 @@ -chip northbridge/amd/gx1 # Northbridge - device domain 0 on # PCI domain - device pci 0.0 on end # Host bridge - chip southbridge/amd/cs5530 # Southbridge - device pci 12.0 on # ISA bridge - chip superio/nsc/pc97317 # Super I/O - device pnp 2e.0 on # PS/2 keyboard - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - end - device pnp 2e.1 on # PS/2 mouse - irq 0x70 = 12 - end - device pnp 2e.2 on # RTC, Advanced power control (APC) - io 0x60 = 0x70 - irq 0x70 = 8 - end - device pnp 2e.3 off # Floppy (N/A on this board) - io 0x60 = 0x3f0 - irq 0x70 = 6 - drq 0x74 = 2 - end - device pnp 2e.4 on # Parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - end - device pnp 2e.5 on # COM2 - io 0x60 = 0x2f8 - irq 0x70 = 3 - end - device pnp 2e.6 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.7 on # GPIO - io 0x60 = 0xe0 - end - device pnp 2e.8 on # Power management - io 0x60 = 0xe8 - end - end - end - device pci 12.1 off end # SMI - device pci 12.2 on end # IDE - device pci 12.3 on end # Audio - device pci 12.4 on end # VGA (onboard) - device pci 13.0 on end # USB - device pci 14.0 on end # MiniPCI slot - device pci 15.0 on end # Ethernet (onboard) - register "ide0_enable" = "1" - register "ide1_enable" = "0" # Not available/needed on this board - end - end - chip cpu/amd/geode_gx1 # CPU - end -end diff --git a/src/mainboard/televideo/tc7020/irq_tables.c b/src/mainboard/televideo/tc7020/irq_tables.c deleted file mode 100644 index 5eef0c0..0000000 --- a/src/mainboard/televideo/tc7020/irq_tables.c +++ /dev/null @@ -1,148 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Nikolay Petukhov nikolay.petukhov@gmail.com - * Copyright (C) 2007 Kenji Noguchi tokyo246@gmail.com - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <arch/pirq_routing.h> -#include <console/console.h> -#include <device/pci.h> - -/* Platform IRQs */ -#define PIRQA 11 -#define PIRQB 10 -#define PIRQC 9 -#define PIRQD 12 - -/* Link */ -#define LINK_PIRQA 1 -#define LINK_PIRQB 2 -#define LINK_PIRQC 3 -#define LINK_PIRQD 4 -#define LINK_NONE 0 - -/* Map */ -#define IRQ_BITMAP_LINKA (1 << PIRQA) -#define IRQ_BITMAP_LINKB (1 << PIRQB) -#define IRQ_BITMAP_LINKC (1 << PIRQC) -#define IRQ_BITMAP_LINKD (1 << PIRQD) -#define IRQ_BITMAP_NOLINK 0x0 - -#define EXCLUSIVE_PCI_IRQS (IRQ_BITMAP_LINKA | IRQ_BITMAP_LINKB | IRQ_BITMAP_LINKC | IRQ_BITMAP_LINKD) - -static const struct irq_routing_table intel_irq_routing_table = { - PIRQ_SIGNATURE, /* u32 signature */ - PIRQ_VERSION, /* u16 version */ - 32+16*CONFIG_IRQ_SLOT_COUNT, /* There can be a total of CONFIG_IRQ_SLOT_COUNT devices on the bus */ - 0x00, /* Where the interrupt router lies (bus) */ - (0x12<<3)|0x0, /* Where the interrupt router lies (dev) */ - EXCLUSIVE_PCI_IRQS, /* IRQs devoted exclusively to PCI usage */ - 0x1078, /* Vendor */ - 0x1, /* Device */ - 0, /* Miniport data */ - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ - 0x60, /* u8 checksum. This has to be set to some - value that would give 0 after the sum of all - bytes for this structure (including checksum) */ - - .slots = { - [0] = { - .slot = 0x0, /* means also "on board" */ - .bus = 0x00, - .devfn = (0x13<<3)|0x0, /* 0x13 is USB OHCI */ - .irq = { - [0] = { /* <-- 0 means this is INTA# output from the device or slot */ - .link = LINK_PIRQA, - .bitmap = IRQ_BITMAP_LINKA - }, - [1] = { /* <-- 1 means this is INTB# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [2] = { /* <-- 2 means this is INTC# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [3] = { /* <-- 3 means this is INTD# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - } - } - }, - - [1] = { - .slot = 0x0, /* means also "on board" */ - .bus = 0x00, - .devfn = (0x15<<3)|0x0, /* 0x15 is NSC Network device */ - .irq = { - [0] = { /* <-- 0 means this is INTA# output from the device or slot */ - .link = LINK_PIRQB, - .bitmap = IRQ_BITMAP_LINKB - }, - [1] = { /* <-- 1 means this is INTB# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [2] = { /* <-- 2 means this is INTC# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [3] = { /* <-- 3 means this is INTD# output from the device or slot */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - } - } - }, - - [2] = { - .slot = 0x1, /* This is a Mini PCI slot */ - .bus = 0x00, - .devfn = (0x14<<3)|0x0, - .irq = { - [0] = { /* <-- 0 means this is INTA# output from the device or slot */ - .link = LINK_PIRQC, - .bitmap = IRQ_BITMAP_LINKC - }, - [1] = { /* <-- 1 means this is INTB# output from the device or slot */ - /* NEEDSWORK: not confirmed. No device to test which uses both INTA and INTB */ - .link = LINK_PIRQD, - .bitmap = IRQ_BITMAP_LINKD - }, - [2] = { /* No INTC# for Mini PCI */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - }, - [3] = { /* No INTD# for Mini PCI */ - .link = LINK_NONE, - .bitmap = IRQ_BITMAP_NOLINK - } - } - }, - } -}; - -/** - * Copy the IRQ routing table to memory. - * - * @param addr Destination address (between 0xF0000...0x100000). - * @return The end address of the pirq routing table in memory. - */ -unsigned long write_pirq_routing_table(unsigned long addr) -{ - return copy_pirq_routing_table(addr, &intel_irq_routing_table); -} diff --git a/src/mainboard/televideo/tc7020/romstage.c b/src/mainboard/televideo/tc7020/romstage.c deleted file mode 100644 index 15362e3..0000000 --- a/src/mainboard/televideo/tc7020/romstage.c +++ /dev/null @@ -1,42 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2007 Juergen Beisert juergen@kreuzholzen.de - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include <stdint.h> -#include <device/pci_def.h> -#include <arch/io.h> -#include <device/pnp_def.h> -#include <arch/hlt.h> -#include <console/console.h> -#include "northbridge/amd/gx1/raminit.c" -#include "superio/nsc/pc97317/early_serial.c" -#include "cpu/x86/bist.h" -#include "southbridge/amd/cs5530/enable_rom.c" - -#define SERIAL_DEV PNP_DEV(0x2e, PC97317_SP1) - -#include <cpu/intel/romstage.h> -static void main(unsigned long bist) -{ - pc97317_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); - console_init(); - report_bist_failure(bist); - cs5530_enable_rom(); - sdram_init(); -}
-
Edward O'Callaghan