Change in coreboot[master]: soc/intel/alderlake: Enable NPK/VISA for PCH and CPU tracing

[Furquan Shaikh (Code Review)]

Attention is currently required from: Bora Guvendik, Anil Kumar K, Cliff Huang, Maulik V Vaghela, Subrata Banik, Bernardo Perez Priego, Thejaswani Putta, Patrick Rudolph.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52140 )

Change subject: soc/intel/alderlake: Enable NPK/VISA for PCH and CPU tracing
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Patch Set 2:

(3 comments)

File src/soc/intel/alderlake/Kconfig:

https://review.coreboot.org/c/coreboot/+/52140/comment/a1093581_88c3a538 
PS2, Line 81: SOC_INTEL_DEBUG_CONSENT
I don't think this should be enabled by default. It should be enabled at the mainboard level only if required.

https://review.coreboot.org/c/coreboot/+/52140/comment/be63bda9_24a042aa 
PS2, Line 276: 7
Why is this being changed from 3 to 7? This conflicts with the comment on lines 274-275.

File src/soc/intel/alderlake/romstage/fsp_params.c:

https://review.coreboot.org/c/coreboot/+/52140/comment/8bd56644_714c9a60 
PS2, Line 129: /* Disable DCI DBC mode */
             : 	m_cfg->DciDbcMode = 0;
             : 
             : 	/* Disable platform debugger support */
             : 	m_cfg->DciUsb3TypecUfpDbg = 0;
             : 
             : 	/* Set trace debug mode to Host Debugger Mode */
             : 	m_cfg->PchTraceHubMode = 2;
             : 	m_cfg->CpuTraceHubMode = 2;
I think this needs to be handled better. Based on your changes it looks like this is applicable only for CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT == 7. If that is the case, then we should add appropriate checks for that.