Change in ...coreboot[master]: mb/google/octopus/variants/fleex: Add PL1 throttling for TSR2

[Sumeet R Pawnikar (Code Review)]

Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30359

Change subject: mb/google/octopus/variants/fleex: Add PL1 throttling for TSR2
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mb/google/octopus/variants/fleex: Add PL1 throttling for TSR2

Add CPU based Power Limit1 throttling for TSR2 sensor.

BUG=b:112448519
BRANCH=octopus
TEST=Built and tested on Fleex system

Change-Id: I5e359afeab7808d162aca233cc1d995aa3c0a29c
Signed-off-by: Sumeet Pawnikar 
---
M src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/30359/1

diff --git a/src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl b/src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl
index 5f35c33..d9cb6d9 100644
--- a/src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl
+++ b/src/mainboard/google/octopus/variants/fleex/include/variant/acpi/dptf.asl
@@ -44,6 +44,9 @@
    /* CPU Effect on Temp Sensor 1 */
    Package () { _SB.PCI0.TCPU, _SB.DPTF.TSR1, 100, 150, 0, 0, 0, 0 },

+	/* CPU Effect on Temp Sensor 2 */
+	Package () { _SB.PCI0.TCPU, _SB.DPTF.TSR2, 100, 300, 0, 0, 0, 0 },
+
 #ifdef DPTF_ENABLE_CHARGER
    /* Charger Effect on Temp Sensor 2 */
    Package () { _SB.DPTF.TCHG, _SB.DPTF.TSR2, 200, 300, 0, 0, 0, 0 },