nsekar@codeaurora.org has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32063
Change subject: Mistral: Enable USB in romstage ......................................................................
Mistral: Enable USB in romstage
Enable USB support for mistral in romstage.
TEST=build & run
Change-Id: I5c2bbe16aa3601e014a2b77d192565402ed23794 Signed-off-by: Nitheesh Sekar nsekar@codeaurora.org --- M src/mainboard/google/mistral/Makefile.inc M src/mainboard/google/mistral/mainboard.c A src/mainboard/google/mistral/romstage.c 3 files changed, 48 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/32063/1
diff --git a/src/mainboard/google/mistral/Makefile.inc b/src/mainboard/google/mistral/Makefile.inc index dfb0bbc..2cb9631 100644 --- a/src/mainboard/google/mistral/Makefile.inc +++ b/src/mainboard/google/mistral/Makefile.inc @@ -11,6 +11,7 @@ romstage-y += memlayout.ld romstage-y += chromeos.c romstage-y += reset.c +romstage-y += romstage.c
ramstage-y += memlayout.ld ramstage-y += chromeos.c diff --git a/src/mainboard/google/mistral/mainboard.c b/src/mainboard/google/mistral/mainboard.c index b45657f..1d62adb 100644 --- a/src/mainboard/google/mistral/mainboard.c +++ b/src/mainboard/google/mistral/mainboard.c @@ -17,6 +17,20 @@ #include <bootblock_common.h> #include <timestamp.h> #include <vendorcode/google/chromeos/chromeos.h> +#include <soc/usb.h> + +static struct usb_board_data usb1_board_data = { + .parameter_override_x0 = 0x63, + .parameter_override_x1 = 0x03, + .parameter_override_x0 = 0x1d, + .parameter_override_x1 = 0x03, +}; + +static void setup_usb(void) +{ + /* Setting Secondary usb controller */ + setup_usb_host(HSUSB_HS_PORT_1, &usb1_board_data); +}
static void mainboard_init(struct device *dev) { @@ -24,6 +38,8 @@ /* Copy WIFI calibration data into CBMEM. */ cbmem_add_vpd_calibration_data(); } + + setup_usb(); }
static void mainboard_enable(struct device *dev) diff --git a/src/mainboard/google/mistral/romstage.c b/src/mainboard/google/mistral/romstage.c new file mode 100644 index 0000000..41ee4ed --- /dev/null +++ b/src/mainboard/google/mistral/romstage.c @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/stages.h> +#include <soc/usb.h> + +static void prepare_usb(void) +{ + /* + * Do DWC3 core and phy reset. Kick these resets off early + * so they get atleast 1msec to settle. + */ + reset_usb(HSUSB_HS_PORT_1); +} + +void platform_romstage_main(void) +{ + prepare_usb(); +}
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32063 )
Change subject: Mistral: Enable USB in romstage ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32063 )
Change subject: Mistral: Enable USB in romstage ......................................................................
Mistral: Enable USB in romstage
Enable USB support for mistral in romstage.
TEST=build & run
Change-Id: I5c2bbe16aa3601e014a2b77d192565402ed23794 Signed-off-by: Nitheesh Sekar nsekar@codeaurora.org Reviewed-on: https://review.coreboot.org/c/coreboot/+/32063 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Patrick Georgi pgeorgi@google.com --- M src/mainboard/google/mistral/Makefile.inc M src/mainboard/google/mistral/mainboard.c A src/mainboard/google/mistral/romstage.c 3 files changed, 48 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/mainboard/google/mistral/Makefile.inc b/src/mainboard/google/mistral/Makefile.inc index dfb0bbc..2cb9631 100644 --- a/src/mainboard/google/mistral/Makefile.inc +++ b/src/mainboard/google/mistral/Makefile.inc @@ -11,6 +11,7 @@ romstage-y += memlayout.ld romstage-y += chromeos.c romstage-y += reset.c +romstage-y += romstage.c
ramstage-y += memlayout.ld ramstage-y += chromeos.c diff --git a/src/mainboard/google/mistral/mainboard.c b/src/mainboard/google/mistral/mainboard.c index b45657f..1d62adb 100644 --- a/src/mainboard/google/mistral/mainboard.c +++ b/src/mainboard/google/mistral/mainboard.c @@ -17,6 +17,20 @@ #include <bootblock_common.h> #include <timestamp.h> #include <vendorcode/google/chromeos/chromeos.h> +#include <soc/usb.h> + +static struct usb_board_data usb1_board_data = { + .parameter_override_x0 = 0x63, + .parameter_override_x1 = 0x03, + .parameter_override_x0 = 0x1d, + .parameter_override_x1 = 0x03, +}; + +static void setup_usb(void) +{ + /* Setting Secondary usb controller */ + setup_usb_host(HSUSB_HS_PORT_1, &usb1_board_data); +}
static void mainboard_init(struct device *dev) { @@ -24,6 +38,8 @@ /* Copy WIFI calibration data into CBMEM. */ cbmem_add_vpd_calibration_data(); } + + setup_usb(); }
static void mainboard_enable(struct device *dev) diff --git a/src/mainboard/google/mistral/romstage.c b/src/mainboard/google/mistral/romstage.c new file mode 100644 index 0000000..41ee4ed --- /dev/null +++ b/src/mainboard/google/mistral/romstage.c @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018, The Linux Foundation. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 and + * only version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/stages.h> +#include <soc/usb.h> + +static void prepare_usb(void) +{ + /* + * Do DWC3 core and phy reset. Kick these resets off early + * so they get atleast 1msec to settle. + */ + reset_usb(HSUSB_HS_PORT_1); +} + +void platform_romstage_main(void) +{ + prepare_usb(); +}
Attention is currently required from: Nitheesh Sekar.
Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32063 )
Change subject: Mistral: Enable USB in romstage ......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/google/mistral/mainboard.c:
https://review.coreboot.org/c/coreboot/+/32063/comment/a66ae874_f45f26de PS2, Line 23: .parameter_override_x0 = 0x63, : .parameter_override_x1 = 0x03, : .parameter_override_x0 = 0x1d, : .parameter_override_x1 = 0x03, it gives: src/mainboard/google/mistral/mainboard.c:12:34: error: initialized field overwritten [-Werror=override-init] 12 | .parameter_override_x0 = 0x1d, | ^~~~ src/mainboard/google/mistral/mainboard.c:12:34: note: (near initialization for 'usb1_board_data.parameter_override_x0') src/mainboard/google/mistral/mainboard.c:13:34: error: initialized field overwritten [-Werror=override-init] 13 | .parameter_override_x1 = 0x03, | ^~~~
Attention is currently required from: Nitheesh Sekar.
Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32063 )
Change subject: Mistral: Enable USB in romstage ......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/google/mistral/mainboard.c:
https://review.coreboot.org/c/coreboot/+/32063/comment/a645cb4d_5cf444bc PS2, Line 23: .parameter_override_x0 = 0x63, : .parameter_override_x1 = 0x03, : .parameter_override_x0 = 0x1d, : .parameter_override_x1 = 0x03,
it gives: […]
Ack
-
Elyes Haouas (Code Review) -
Name of user not set (Code Review)
-
Patrick Georgi (Code Review)