[M] Change in coreboot[master]: soc/amd/common/acpi: Implement DTTS Proposal

[build bot (Jenkins) (Code Review)]

Attention is currently required from: Jason Nien, EricKY Cheng, Matt DeVillier, Paul Menzel, Eric Lai, Martin Roth, Tim Van Patten, Eric Peers, LeilaCY Lin, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held.

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 )

Change subject: soc/amd/common/acpi: Implement DTTS Proposal
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Patch Set 74:

(2 comments)

Commit Message:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164966):
https://review.coreboot.org/c/coreboot/+/68471/comment/0826caf7_ef4ea7bf 
PS74, Line 14: mode.
Possible unwrapped commit description (prefer a maximum 72 chars per line)

File src/soc/amd/common/acpi/dptc.asl:

Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164966):
https://review.coreboot.org/c/coreboot/+/68471/comment/b19cb461_f47eaf50 
PS74, Line 34: #if CONFIG(FEATURE_DYNAMIC_DPTC) 
trailing whitespace