[S] Change in coreboot[master]: drivers/amd: Update to use defined post codes

[Martin L Roth (Code Review)]

Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/71591 )

Change subject: drivers/amd: Update to use defined post codes
......................................................................

drivers/amd: Update to use defined post codes

Signed-off-by: Martin Roth 
Change-Id: I2d5700534c07e89b3908a2e6b827db919a48795d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71591
Tested-by: build bot (Jenkins) 
Reviewed-by: Felix Held 
Reviewed-by: Fred Reitberger 
---
M src/drivers/amd/agesa/cache_as_ram.S
1 file changed, 17 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Felix Held: Looks good to me, approved
  Fred Reitberger: Looks good to me, approved

diff --git a/src/drivers/amd/agesa/cache_as_ram.S b/src/drivers/amd/agesa/cache_as_ram.S
index 0d678d1..e342039 100644
--- a/src/drivers/amd/agesa/cache_as_ram.S
+++ b/src/drivers/amd/agesa/cache_as_ram.S
@@ -12,6 +12,7 @@

#include <cpu/x86/lapic_def.h>
 #include <cpu/x86/post_code.h>
+#include <amdblocks/post_codes.h>

.section .init

@@ -30,7 +31,7 @@
  */
 bootblock_pre_c_entry:

-	post_code(0xa0)
+	post_code(POST_BOOTBLOCK_PRE_C_ENTRY)

AMD_ENABLE_STACK

@@ -56,7 +57,7 @@
    movd	%mm1, %eax
    pushl	%eax		/* tsc[31:0] */

-	post_code(0xa2)
+	post_code(POST_BOOTBLOCK_PRE_C_DONE)

call	bootblock_c_entry