New patch to review for coreboot: intelblocks/pci_dev: Create header for pci devices

[Subrata Banik]

Subrata Banik ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/18576

-gerrit

commit fea78355f85f06716325affc5df4271ecbd4d4f4
Author: Subrata Banik 
Date:   Sun Mar 5 12:37:00 2017 +0530

intelblocks/pci_dev: Create header for pci devices

Change-Id: I5e4c7502e9678c0a367e9c7a96cf848d5b24f68e
    Signed-off-by: Barnali Sarkar 
    Signed-off-by: Subrata Banik 
---
 .../common/block/include/intelblocks/pci_devs.h    | 34 ++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/src/soc/intel/common/block/include/intelblocks/pci_devs.h b/src/soc/intel/common/block/include/intelblocks/pci_devs.h
new file mode 100644
index 0000000..9862cc4
--- /dev/null
+++ b/src/soc/intel/common/block/include/intelblocks/pci_devs.h
@@ -0,0 +1,34 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2017 Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef SOC_INTEL_COMMON_PCI_DEVS_H
+#define SOC_INTEL_COMMON_PCI_DEVS_H
+
+#include <device/pci_def.h>
+#include <rules.h>
+
+#define _SA_DEVFN(slot)		PCI_DEVFN(SA_DEV_SLOT_ ## slot, 0)
+
+#if ENV_RAMSTAGE
+#include <device/device.h>
+#include <device/pci_def.h>
+#define _SA_DEV(slot)		dev_find_slot(0, _SA_DEVFN(slot))
+#else
+#include <arch/io.h>
+#define _SA_DEV(slot)		PCI_DEV(0, SA_DEV_SLOT_ ## slot, 0)
+#endif
+
+#endif
+