Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41615 )
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by malefor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt.
In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs.
Differences in auto-generated SPD from current SPD are as follows:
Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 6 0x95 0x05 As per datasheet, this is a single die device. So, value should be 0x05. 19 0x00 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0.
BUG=b:155239397,b:147321551
Change-Id: I8b8bdc55314f538aff4dd1944a0b745357744d8c Signed-off-by: Furquan Shaikh furquan@google.com --- A src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc A src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt 2 files changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/41615/1
diff --git a/src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc b/src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc new file mode 100644 index 0000000..ac644a1 --- /dev/null +++ b/src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc @@ -0,0 +1,4 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +SPD_SOURCES = +SPD_SOURCES += spd-3.hex # ID = 0(0b0000) Parts = K4U6E3S4AA-MGCL diff --git a/src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt b/src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt new file mode 100644 index 0000000..a226d2f --- /dev/null +++ b/src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt @@ -0,0 +1 @@ +K4U6E3S4AA-MGCL
Hello build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41615
to look at the new patch set (#6).
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by malefor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt.
In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs.
Differences in auto-generated SPD from current SPD are as follows:
Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 6 0x95 0x05 As per datasheet, this is a single die device. So, value should be 0x05. 19 0x00 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0.
BUG=b:155239397,b:147321551
Change-Id: I8b8bdc55314f538aff4dd1944a0b745357744d8c Signed-off-by: Furquan Shaikh furquan@google.com --- A src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc A src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt 2 files changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/41615/6
Hello build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41615
to look at the new patch set (#7).
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by malefor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt.
In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs.
Differences in auto-generated SPD from current SPD are as follows:
Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 6 0x95 0x05 As per datasheet, this is a single die device. So, value should be 0x05. 19 0x00 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0.
BUG=b:155239397,b:147321551
Change-Id: I8b8bdc55314f538aff4dd1944a0b745357744d8c Signed-off-by: Furquan Shaikh furquan@google.com --- A src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc A src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt 2 files changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/41615/7
Hello build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41615
to look at the new patch set (#8).
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by malefor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt.
In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs.
Differences in auto-generated SPD from current SPD are as follows:
Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 6 0x95 0x05 As per datasheet, this is a single die device. So, value should be 0x05. 19 0x0F 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0.
BUG=b:155239397,b:147321551
Change-Id: I8b8bdc55314f538aff4dd1944a0b745357744d8c Signed-off-by: Furquan Shaikh furquan@google.com --- A src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc A src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt 2 files changed, 5 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/41615/8
Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41615 )
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
Patch Set 8: Code-Review+2
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41615
to look at the new patch set (#9).
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by malefor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt.
In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs.
Differences in auto-generated SPD from current SPD are as follows:
Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 19 0x0F 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0.
BUG=b:155239397,b:147321551
Change-Id: I8b8bdc55314f538aff4dd1944a0b745357744d8c Signed-off-by: Furquan Shaikh furquan@google.com --- A src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc A src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt 2 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/41615/9
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41615
to look at the new patch set (#11).
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by malefor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt.
In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs.
Differences in auto-generated SPD from current SPD are as follows:
Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 6 0x95 0x94 Signal loading is not used by MRC. Bits 1:0 set to 0. 16 0x48 0x00 Signal loading is not used by MRC. Set to 0x00. 19 0x0F 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0.
BUG=b:155239397,b:147321551
Change-Id: I8b8bdc55314f538aff4dd1944a0b745357744d8c Signed-off-by: Furquan Shaikh furquan@google.com --- A src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc A src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt A src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt 3 files changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/41615/11
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41615
to look at the new patch set (#12).
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by malefor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt.
In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs.
Differences in auto-generated SPD from current SPD are as follows:
Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 6 0x95 0x94 Signal loading is not used by MRC. Bits 1:0 set to 0. 16 0x48 0x00 Signal loading is not used by MRC. Set to 0x00. 19 0x0F 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0.
BUG=b:155239397,b:147321551
Change-Id: I8b8bdc55314f538aff4dd1944a0b745357744d8c Signed-off-by: Furquan Shaikh furquan@google.com --- A src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc A src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt A src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt 3 files changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/41615/12
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Aaron Durbin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41615
to look at the new patch set (#13).
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by malefor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt.
In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs.
Differences in auto-generated SPD from current SPD are as follows:
Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 6 0x95 0x94 Signal loading is not used by MRC. Bits 1:0 set to 0. 16 0x48 0x00 Signal loading is not used by MRC. Set to 0x00. 19 0x0F 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0.
BUG=b:155239397,b:147321551
Change-Id: I8b8bdc55314f538aff4dd1944a0b745357744d8c Signed-off-by: Furquan Shaikh furquan@google.com --- A src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc A src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt A src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt 3 files changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/41615/13
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41615 )
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
Patch Set 14: Code-Review+1
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Aaron Durbin, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41615
to look at the new patch set (#15).
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by malefor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt.
In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs.
Differences in auto-generated SPD from current SPD are as follows:
Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 6 0x95 0x94 Signal loading is not used by MRC. Bits 1:0 set to 0. 16 0x48 0x00 Signal loading is not used by MRC. Set to 0x00. 19 0x0F 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0.
BUG=b:155239397,b:147321551
Change-Id: I8b8bdc55314f538aff4dd1944a0b745357744d8c Signed-off-by: Furquan Shaikh furquan@google.com --- A src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc A src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt A src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt 3 files changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/41615/15
Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Aaron Durbin, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41615
to look at the new patch set (#19).
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by malefor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt.
In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs.
Differences in auto-generated SPD from current SPD are as follows:
Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 6 0x95 0x94 Signal loading is not used by MRC. Bits 1:0 set to 0. 16 0x48 0x00 Signal loading is not used by MRC. Set to 0x00. 19 0x0F 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0.
BUG=b:155239397,b:147321551
Change-Id: I8b8bdc55314f538aff4dd1944a0b745357744d8c Signed-off-by: Furquan Shaikh furquan@google.com --- A src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc A src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt A src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt 3 files changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/41615/19
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41615 )
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
Patch Set 20: Code-Review+2
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41615 )
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
Patch Set 20: Code-Review+1
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/41615 )
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go
This change adds mem_list_variant.txt that contains the list of memory parts used by malefor and Makefile.inc generated by gen_part_id.go using mem_list_variant.txt.
In the final change of the series, all volteer variants will be switched from using the current SPDs to new auto-generated SPDs.
Differences in auto-generated SPD from current SPD are as follows:
Part: K4U6E3S4AA-MGCL Byte# Current New Explanation 6 0x95 0x94 Signal loading is not used by MRC. Bits 1:0 set to 0. 16 0x48 0x00 Signal loading is not used by MRC. Set to 0x00. 19 0x0F 0xFF As per JEDEC spec, tckMax should be 100ns. So, value should be 0xff as per datasheet. 21,22 0x55,0x00 0x54,0x05 As per datasheet, part supports CAS latencies 20,24,28,32,36. So value should be 0x54, 0x05. 24 0x8C 0x87 taa is .468ns * CAS-36 which results in byte 24 being 0x87 as per datasheet. 123 0x00 0xE5 Fine offset for taa. Expected value is 0xE5 as per datasheet. 124 0x7F 0x00 Fine offset for tckMax. Expected value is 0x00 as per datasheet. 125 0xE1 0xE0 Fine offset for tckMin. As per datasheet tckMin is 0.468ns. So, this comes out to be 0xE0.
BUG=b:155239397,b:147321551
Change-Id: I8b8bdc55314f538aff4dd1944a0b745357744d8c Signed-off-by: Furquan Shaikh furquan@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/41615 Reviewed-by: Nick Vaccaro nvaccaro@google.com Reviewed-by: Karthik Ramasubramanian kramasub@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- A src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc A src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt A src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt 3 files changed, 8 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Nick Vaccaro: Looks good to me, approved Karthik Ramasubramanian: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc b/src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc new file mode 100644 index 0000000..4c95819 --- /dev/null +++ b/src/mainboard/google/volteer/variants/malefor/memory/Makefile.inc @@ -0,0 +1,5 @@ +## SPDX-License-Identifier: GPL-2.0-or-later +## This is an auto-generated file. Do not edit!! + +SPD_SOURCES = +SPD_SOURCES += spd-1.hex # ID = 0(0b0000) Parts = K4U6E3S4AA-MGCL diff --git a/src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt b/src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt new file mode 100644 index 0000000..9bf0bd9 --- /dev/null +++ b/src/mainboard/google/volteer/variants/malefor/memory/dram_id.generated.txt @@ -0,0 +1,2 @@ +DRAM Part Name ID to assign +K4U6E3S4AA-MGCL 0 (0000) diff --git a/src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt b/src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt new file mode 100644 index 0000000..a226d2f --- /dev/null +++ b/src/mainboard/google/volteer/variants/malefor/memory/mem_list_variant.txt @@ -0,0 +1 @@ +K4U6E3S4AA-MGCL
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41615 )
Change subject: mb/google/volteer/var/malefor: Use auto-generated Makefile.inc using gen_part_id.go ......................................................................
Patch Set 22:
Automatic boot test returned (PASS/FAIL/TOTAL): 4/0/4 Emulation targets: "QEMU x86 q35/ich9" using payload TianoCore : SUCCESS : https://lava.9esec.io/r/5124 "QEMU x86 q35/ich9" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/5123 "QEMU x86 i440fx/piix4" using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/5122 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/5121
Please note: This test is under development and might not be accurate at all!