Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
soc/intel/*/Kconfig: Enable x86_64 Kconfig option
Tested on Intel Skylake. Compiles and boots without issues. Used tianocore as payload and could boot into Ubuntu 20.
Other platforms might not compile due to drivers not being ported to x86_64 or might not boot due to a yet unsupported boot flow.
Untested: * FSP MPinit * FSP-T * SMM loader v2 * libgfxinit * FSP graphics init
Change-Id: Id2919766acc2e11d81c279c23380a9e6fd50f0bb Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/apollolake/Kconfig M src/soc/intel/cannonlake/Kconfig M src/soc/intel/common/block/cpu/Kconfig M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/elkhartlake/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/jasperlake/Kconfig M src/soc/intel/skylake/Kconfig M src/soc/intel/tigerlake/Kconfig 10 files changed, 24 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/48244/1
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index d6db6a0..61d8ee4 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -8,7 +8,8 @@ config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !EXP_ARCH_X86_64 + select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 29e133c..0df396d 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -22,7 +22,8 @@ def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_NO_PCAT_8259 - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !EXP_ARCH_X86_64 + select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64 select BOOT_DEVICE_SUPPORTS_WRITES # CPU specific options select CPU_INTEL_COMMON diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index f256405..07cdeb5 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -74,7 +74,8 @@ def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_NHLT - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !EXP_ARCH_X86_64 + select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig index 9023b58..6a95b4d 100644 --- a/src/soc/intel/common/block/cpu/Kconfig +++ b/src/soc/intel/common/block/cpu/Kconfig @@ -1,3 +1,9 @@ +config EXP_ARCH_X86_64 + bool "Experimental x86_64 support" + default n + help + This option will compile and run coreboot in x86_64 long mode. + config SOC_INTEL_COMMON_BLOCK_CPU bool default n diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index 98c61ce..9ad2a70 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -13,7 +13,8 @@
config CPU_SPECIFIC_OPTIONS def_bool y - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !EXP_ARCH_X86_64 + select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64 select BOOT_DEVICE_SUPPORTS_WRITES select DEBUG_GPIO select SOC_INTEL_COMMON diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig index 64680e8..4cfee7e 100644 --- a/src/soc/intel/elkhartlake/Kconfig +++ b/src/soc/intel/elkhartlake/Kconfig @@ -8,7 +8,8 @@ config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !EXP_ARCH_X86_64 + select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 5fdfa2f..4dedbe7 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -8,7 +8,8 @@ config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !EXP_ARCH_X86_64 + select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig index c23e3ce..683865a 100644 --- a/src/soc/intel/jasperlake/Kconfig +++ b/src/soc/intel/jasperlake/Kconfig @@ -8,7 +8,8 @@ config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !EXP_ARCH_X86_64 + select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index c61304b..bb39571 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -19,7 +19,8 @@ def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_NHLT - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !EXP_ARCH_X86_64 + select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index b95b2f0..e4cd466 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -8,7 +8,8 @@ config CPU_SPECIFIC_OPTIONS def_bool y select ACPI_INTEL_HARDWARE_SLEEP_VALUES - select ARCH_ALL_STAGES_X86_32 + select ARCH_ALL_STAGES_X86_32 if !EXP_ARCH_X86_64 + select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64 select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select CPU_INTEL_COMMON
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 4: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48244/4/src/soc/intel/alderlake/Kco... File src/soc/intel/alderlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/48244/4/src/soc/intel/alderlake/Kco... PS4, Line 11: ARCH_ALL_STAGES_X86_32 It might make sense to have a new config ARCH_ALL_STAGES_X86 in srch/arch/x86 that selects ARCH_ALL_STAGES_X86_32 or ARCH_ALL_STAGES_X86_64 depending upon EXP_ARCH_X86_64. Then this per SoC switch won't be required.
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48244/4/src/soc/intel/alderlake/Kco... File src/soc/intel/alderlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/48244/4/src/soc/intel/alderlake/Kco... PS4, Line 11: ARCH_ALL_STAGES_X86_32
It might make sense to have a new config ARCH_ALL_STAGES_X86 in srch/arch/x86 that selects ARCH_ALL_ […]
I totally agree to move it to a common place. For now it only runs on a small subset of supported SoC and haven't been tested over a longer period. I'll move this to a common place once all SoC are confirmed to build and boot (but might not be 100% error free).
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 6: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/48244/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/48244/6//COMMIT_MSG@10 PS6, Line 10: 20 Nit: 20.04 or 20.10?
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48244/6/src/soc/intel/common/block/... File src/soc/intel/common/block/cpu/Kconfig:
https://review.coreboot.org/c/coreboot/+/48244/6/src/soc/intel/common/block/... PS6, Line 1: config EXP_ARCH_X86_64 Should EXP_ be in the name?
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48244/6/src/soc/intel/common/block/... File src/soc/intel/common/block/cpu/Kconfig:
https://review.coreboot.org/c/coreboot/+/48244/6/src/soc/intel/common/block/... PS6, Line 1: config EXP_ARCH_X86_64
Should EXP_ be in the name?
I have to use a prefix to make the linter of defconfig files happy. (Kconfigs must not start with ARCH_) Do you want to suggest a better prefix?
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 6:
I tried this with clevo/l140cu (Comet Lake) but it only works until FSP-M is called. Here's the log. It's not much, but well.. https://paste.debian.net/1179769/
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 6:
Just tried this with clevo/n130wu and coreboot seems to boot fine, but Tianocore doesn't show up https://pastebin.com/3hu3LGyw.
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/48244/6/src/soc/intel/common/block/... File src/soc/intel/common/block/cpu/Kconfig:
https://review.coreboot.org/c/coreboot/+/48244/6/src/soc/intel/common/block/... PS6, Line 1: config EXP_ARCH_X86_64
I have to use a prefix to make the linter of defconfig files happy. […]
Maybe SOC_ARCH_X86_64?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 6:
(4 comments)
https://review.coreboot.org/c/coreboot/+/48244/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/48244/6//COMMIT_MSG@7 PS6, Line 7: Enable x86_64 Kconfig option `Enable` sounds like you're changing the default. How about `Allow building for x86_64` ?
https://review.coreboot.org/c/coreboot/+/48244/6//COMMIT_MSG@9 PS6, Line 9: Tested on Intel Skylake. Compiles and boots without issues. Please add a config to keep this known-working case build-tested.
https://review.coreboot.org/c/coreboot/+/48244/6//COMMIT_MSG@12 PS6, Line 12: Other platforms might not compile due to drivers not being ported : to x86_64 or might not boot due to a yet unsupported boot flow. Ideally, Jenkins should also build-test all boards with x86_64, like it does for CHROMEOS. This patch adds the option to many SoCs, but does not ensure that it at least gets build-tested.
IMHO, I'd prefer to only add the option to Skylake for now, along with a known-working configuration for Jenkins to build-test.
https://review.coreboot.org/c/coreboot/+/48244/6/src/soc/intel/common/block/... File src/soc/intel/common/block/cpu/Kconfig:
https://review.coreboot.org/c/coreboot/+/48244/6/src/soc/intel/common/block/... PS6, Line 1: config EXP_ARCH_X86_64
Maybe SOC_ARCH_X86_64?
Wasn't there an equivalent option elsewhere?
Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 6:
Patch Set 6:
Just tried this with clevo/n130wu and coreboot seems to boot fine, but Tianocore doesn't show up https://pastebin.com/3hu3LGyw.
coreboot's default builds of TianoCore (IA32X64) start in 32-bit mode, then switch to 64-bit mode before the DXE phase. (Note that upstream UefiPayload can be built purely as X64.) Does coreboot switch back to 32-bit mode before executing the payload?
Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 6:
(3 comments)
Patch Set 6:
Patch Set 6:
Just tried this with clevo/n130wu and coreboot seems to boot fine, but Tianocore doesn't show up https://pastebin.com/3hu3LGyw.
coreboot's default builds of TianoCore (IA32X64) start in 32-bit mode, then switch to 64-bit mode before the DXE phase. (Note that upstream UefiPayload can be built purely as X64.) Does coreboot switch back to 32-bit mode before executing the payload?
Yes, all payloads are run in x86_32, even when building and running coreboot for x86_64.
https://review.coreboot.org/c/coreboot/+/48244/6//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/48244/6//COMMIT_MSG@9 PS6, Line 9: Tested on Intel Skylake. Compiles and boots without issues.
Please add a config to keep this known-working case build-tested.
Done in CB:48452
https://review.coreboot.org/c/coreboot/+/48244/6//COMMIT_MSG@10 PS6, Line 10: 20
Nit: 20.04 or 20. […]
Don't know.
https://review.coreboot.org/c/coreboot/+/48244/6//COMMIT_MSG@12 PS6, Line 12: Other platforms might not compile due to drivers not being ported : to x86_64 or might not boot due to a yet unsupported boot flow.
Ideally, Jenkins should also build-test all boards with x86_64, like it does for CHROMEOS. […]
A build test is added in CB:48452. I would enable a global build test once all socs are supported and are building without errors.
Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Enable x86_64 Kconfig option ......................................................................
Patch Set 6:
Just tried this with clevo/n130wu and coreboot seems to boot fine, but Tianocore doesn't show up https://pastebin.com/3hu3LGyw.
coreboot's default builds of TianoCore (IA32X64) start in 32-bit mode, then switch to 64-bit mode before the DXE phase. (Note that upstream UefiPayload can be built purely as X64.) Does coreboot switch back to 32-bit mode before executing the payload?
Ah, I assumed something like that, but I didn't have the time to dig further. I saw some hints while TianoCore built.
Hello build bot (Jenkins), Mariusz Szafrański, Paul Menzel, Suresh Bellampalli, Vanessa Eusebio, Arthur Heymans, Michal Motyl, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48244
to look at the new patch set (#7).
Change subject: soc/intel/*/Kconfig: Allow building for x86_64 ......................................................................
soc/intel/*/Kconfig: Allow building for x86_64
Tested on Intel Skylake. Compiles and boots without issues. Used tianocore as payload and could boot into Ubuntu 20.
Other platforms might not compile due to drivers not being ported to x86_64 or might not boot due to a yet unsupported boot flow.
Untested: * FSP MPinit * FSP-T * SMM loader v2 * libgfxinit * FSP graphics init
Change-Id: Id2919766acc2e11d81c279c23380a9e6fd50f0bb Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/apollolake/Kconfig M src/soc/intel/cannonlake/Kconfig M src/soc/intel/common/block/cpu/Kconfig M src/soc/intel/denverton_ns/Kconfig M src/soc/intel/elkhartlake/Kconfig M src/soc/intel/icelake/Kconfig M src/soc/intel/jasperlake/Kconfig M src/soc/intel/skylake/Kconfig M src/soc/intel/tigerlake/Kconfig 10 files changed, 24 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/48244/7
Attention is currently required from: Angel Pons. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 7:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/48244/comment/5c85e8b6_0b5b67d3 PS6, Line 7: Enable x86_64 Kconfig option
`Enable` sounds like you're changing the default. […]
Done
Attention is currently required from: Patrick Rudolph, Angel Pons. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 8:
(1 comment)
File src/soc/intel/apollolake/Kconfig:
https://review.coreboot.org/c/coreboot/+/48244/comment/882e2c43_3069d89e PS8, Line 26: select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64 I just noticed, there are pointers in APL and GLK FSP-M structures. Maybe it's not worth to try.
Attention is currently required from: Nico Huber, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 8:
(1 comment)
File src/soc/intel/apollolake/Kconfig:
https://review.coreboot.org/c/coreboot/+/48244/comment/0380e751_899105ff PS8, Line 26: select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64
I just noticed, there are pointers in APL and GLK FSP-M structures. Maybe […]
I complained in an earlier patchset about the x86_64 Kconfig option not being build-tested by Jenkins on this patch. Maybe I didn't complain loud enough.
Attention is currently required from: Patrick Rudolph, Angel Pons. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 8:
(1 comment)
File src/soc/intel/apollolake/Kconfig:
https://review.coreboot.org/c/coreboot/+/48244/comment/3dafd303_aa12c0d6 PS8, Line 26: select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64
I complained in an earlier patchset about the x86_64 Kconfig option not being build-tested by Jenkin […]
It wouldn't be visible during build. But the binary representations of the structs would be off. Iow. the problem is that it would be valid C but with different sizes.
Attention is currently required from: Nico Huber, Patrick Rudolph. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 8:
(1 comment)
File src/soc/intel/apollolake/Kconfig:
https://review.coreboot.org/c/coreboot/+/48244/comment/6d942101_388a3fce PS8, Line 26: select ARCH_ALL_STAGES_X86_64 if EXP_ARCH_X86_64
It wouldn't be visible during build. But the binary representations of […]
Ah yes, good point. That's why I'd prefer to only add the option to platforms that are known to work for now.
Attention is currently required from: Nico Huber. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/*/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 8:
(1 comment)
Patchset:
PS8: Tests on CFL and coreboot master showed an issue in postcar stage. The CPU is not able to do data accesses (R/W) to a page it's currently executing from. This is usually not an issue in CAR as it's XIP and heap and stack reside in a separate NEM area.
Investigation is ongoing if this is a CPU bug or something else broke it in master.
Attention is currently required from: Nico Huber. Hello build bot (Jenkins), Mariusz Szafrański, Paul Menzel, Suresh Bellampalli, Vanessa Eusebio, Arthur Heymans, Michal Motyl, Andrey Petrov, Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/48244
to look at the new patch set (#9).
Change subject: soc/intel/cannonlake/Kconfig: Allow building for x86_64 ......................................................................
soc/intel/cannonlake/Kconfig: Allow building for x86_64
Tested on Intel Coffeelake. Compiles and boots without issues. Used tianocore as payload and could boot into Ubuntu 20.
Untested: * FSP MPinit * FSP-T * libgfxinit * FSP graphics init
Change-Id: Id2919766acc2e11d81c279c23380a9e6fd50f0bb Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/common/block/cpu/Kconfig 2 files changed, 8 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/48244/9
Attention is currently required from: Nico Huber, Patrick Rudolph. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/cannonlake/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 9: Code-Review+2
Attention is currently required from: Nico Huber, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/cannonlake/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9: @Patrick: Have you tested this with FSP APIs ?
Attention is currently required from: Nico Huber, Subrata Banik. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/cannonlake/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
@Patrick: Have you tested this with FSP APIs ?
Yes, this is a regular build with FSP-M and FSP-S involved and FSP MPInit disabled. It automatically uses the protected mode wrapper to run FSP binaries in x86_32 mode. It'll likely not work with FSP MPinit as there are no wrappers around the PPI yet.
Attention is currently required from: Nico Huber, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/cannonlake/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
Yes, this is a regular build with FSP-M and FSP-S involved and FSP MPInit disabled. […]
Got it,
what you suggest when we have FSP binary build with x86_64. will the protected mode wrapper is enough or need some change ?
Attention is currently required from: Nico Huber, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/cannonlake/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
Got it, […]
As I'm building coreboot in x86_64 bit and have FSP also in same mode, i don't think we need that glue layer to switch the mode for making 32bit call, isn't it ?
Attention is currently required from: Nico Huber, Subrata Banik. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/cannonlake/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
Got it, […]
Not sure if I got the question correct. When FSP binaries are build with x86_64 SysV ABI mode and coreboot is build in x86_64 SysV ABI mode there's no need for a (protected mode) wrapper.
Running a x86_64 FSP on x86_32 coreboot is not supported at the moment. There's no wrapper code.
Attention is currently required from: Nico Huber, Patrick Rudolph. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/cannonlake/Kconfig: Allow building for x86_64 ......................................................................
Patch Set 9:
(1 comment)
Patchset:
PS9:
Not sure if I got the question correct. […]
Yes Patrick, you are right. I've build coreboot in x86_64 mode and enabled below configs
CONFIG_ARCH_BOOTBLOCK_X86_64=y CONFIG_ARCH_VERSTAGE_X86_64=y CONFIG_ARCH_ROMSTAGE_X86_64=y CONFIG_ARCH_POSTCAR_X86_64=y CONFIG_ARCH_RAMSTAGE_X86_64=y CONFIG_ARCH_ALL_STAGES_X86_64=y CONFIG_HAVE_EXP_X86_64_SUPPORT=y CONFIG_USE_EXP_X86_64_SUPPORT=y
Also having FSP binaries in x86_64 mode as well, I guess we don't need this glue logic. Will let you know how this exp goes.
Patrick Rudolph has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/48244 )
Change subject: soc/intel/cannonlake/Kconfig: Allow building for x86_64 ......................................................................
Abandoned
superseeded by CB:58089
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