Change in coreboot[master]: [WIP]cpu/x86/smm: Support PARALLEL_MP with SMM_ASEG

[Arthur Heymans (Code Review)]

Attention is currently required from: Arthur Heymans, Kyösti Mälkki.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58700 )

Change subject: [WIP]cpu/x86/smm: Support PARALLEL_MP with SMM_ASEG
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Patch Set 3:

(1 comment)

File src/cpu/x86/smm/smm_module_loader.c:

https://review.coreboot.org/c/coreboot/+/58700/comment/f4855477_0e9b2a63 
PS2, Line 619:  */
> Patchset #1, #2 have stuff leaking below 0xa0000.
>
> Installing permanent SMM handler to 0x000a0000
> smm_create_map: cpus allowed in one segment 62
> smm_create_map: min # of segments needed 1
> CPU 0x0
>     smbase a0000  entry a8000
>            ss_start afe00  code_end a81e0
> CPU 0x1
>     smbase 9fe00  entry a7e00
>            ss_start afc00  code_end a7fe0

That looks fine. smbase are below 0xa0000 so that the save states grow downwards from 0xb0000.