[XS] Change in coreboot[main]: soc/intel/pantherlake: Set SMBUS device ACPI min sleep state as D0

[Subrata Banik (Code Review)]

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84909?usp=email )

(

1 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
 )Change subject: soc/intel/pantherlake: Set SMBUS device ACPI min sleep state as D0
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soc/intel/pantherlake: Set SMBUS device ACPI min sleep state as D0

This change sets the SMBUS device to min sleep state D0 in the ACPI
sleep state table.

TEST=Able to build and boot google/fatcat.

w/o this patch:

[WARN ]  Unknown min d_state for PCI: 00:1f.4

w/ this patch:

No Error or Warning.

Change-Id: If84d2ee8abfef34f6411e01e6c37d4e2008a3666
Signed-off-by: Subrata Banik 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84909
Reviewed-by: Paul Menzel 
Reviewed-by: Pranava Y N 
Tested-by: build bot (Jenkins) 
---
M src/soc/intel/pantherlake/acpi.c
1 file changed, 1 insertion(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Pranava Y N: Looks good to me, approved

diff --git a/src/soc/intel/pantherlake/acpi.c b/src/soc/intel/pantherlake/acpi.c
index fd17ef5..c49555b 100644
--- a/src/soc/intel/pantherlake/acpi.c
+++ b/src/soc/intel/pantherlake/acpi.c
@@ -225,6 +225,7 @@
    { PCI_DEVFN_ESPI,	ACPI_DEVICE_SLEEP_D0 },
    { PCH_DEVFN_PMC,	ACPI_DEVICE_SLEEP_D0 },
    { PCI_DEVFN_HDA,	ACPI_DEVICE_SLEEP_D0 },
+	{ PCI_DEVFN_SMBUS,	ACPI_DEVICE_SLEEP_D0 },
    { PCI_DEVFN_SPI,	ACPI_DEVICE_SLEEP_D3 },
    { PCI_DEVFN_GBE,	ACPI_DEVICE_SLEEP_D3 },
 };