[M] Change in coreboot[master]: mb/intel/mtlrvp: Describe TCSS USB ports - coreboot-gerrit

6 Feb 2023


      Attention is currently required from: Jamie Ryu, Sridhar Siricilla, Eric Lai, Usha P.
Harsha B R has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/72785 )
Change subject: mb/intel/mtlrvp: Describe TCSS USB ports
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Patch Set 4:
(1 comment)
File src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb:
https://review.coreboot.org/c/coreboot/+/72785/comment/283a4b86_4a8ae83b 
PS2, Line 51: 				register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
...
UPC_TYPE_HUB is fine outside, but register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" should be a port.
Ack
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I0054ac4e3d1d9b97cfea615831ec8f3d3e00c9e0
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