Patch merged into coreboot/master: fsp_baytrail: Change A, A, A, A IRQ routing to A, A, A, B

the following patch was just integrated into master:
commit cf752fe9666919e5c403a9dac09a70cbaf64fa1f
Author: Martin Roth 
Date:   Wed Dec 2 16:20:53 2015 -0700

fsp_baytrail: Change A, A, A, A IRQ routing to A, A, A, B

Devices that have their interrupt routing set to A, A, A, A don't get
    any interrupt values assigned because that series evaluates to 0.  The
    code that sets the interrupt values checks to make sure a value is set
    by verifying that it's not 0.  On Bay Trail, these are all
    single-function graphics devices, so by changing one of the unused
    interrupt lines from A to any other value, it assigns the values
    correctly.

This issue did not affect ACPI interrupt routing.

This is just a workaround, and the root issue still needs to be fixed.

Change-Id: I78866e3e0079435037e457a4fb04979254b56ee2
    Signed-off-by: Martin Roth 
    Reviewed-on: https://review.coreboot.org/12629
    Tested-by: build bot (Jenkins)
    Reviewed-by: Ben Gardner 
    Reviewed-by: Stefan Reinauer

See https://review.coreboot.org/12629 for details.

-gerrit