Patch set updated for coreboot: soc/apollolake: Allow enable\disable of LPSS S0ix from devicetree

[Hannah Williams]

Hannah Williams ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15055

-gerrit

commit b32ef369d8a7e7802b58c9582f4ad3498527c297
Author: Saurabh Satija 
Date:   Tue May 3 15:15:31 2016 -0700

soc/apollolake: Allow enable\disable of LPSS S0ix from devicetree

Change-Id: Ib7aa1d1b32adcb541a155b8ba2ee011cb5bcf784
    Signed-off-by: Saurabh Satija 
    Signed-off-by: Hannah Williams 
---
 src/soc/intel/apollolake/chip.c | 2 ++
 src/soc/intel/apollolake/chip.h | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index 821570b..b776686 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -261,6 +261,8 @@ void platform_fsp_silicon_init_params_cb(struct FSPS_UPD *silupd)

silconfig->IshEnable = cfg->integrated_sensor_hub_enable;

+	silconfig->LPSS_S0ixEnable = cfg->lpss_s0ix_enable;
+
    /* Disable setting of EISS bit in FSP. */
    silconfig->SpiEiss = 0;
 }
diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h
index ef82c53..0cde7d7 100644
--- a/src/soc/intel/apollolake/chip.h
+++ b/src/soc/intel/apollolake/chip.h
@@ -79,6 +79,9 @@ struct soc_intel_apollolake_config {

/* Integrated Sensor Hub */
    uint8_t integrated_sensor_hub_enable;
+
+	/* Configure LPSS S0ix Enable */
+	uint8_t lpss_s0ix_enable;
 };

#endif	/* _SOC_APOLLOLAKE_CHIP_H_ */