Nico Huber has uploaded this change for review. ( https://review.coreboot.org/26697
Change subject: gma ironlake..broadwell: Enable X-tiling ......................................................................
gma ironlake..broadwell: Enable X-tiling
Generations pre Skylake support X-tiling only.
Change-Id: I828e20e2a6bf71c88cf9e23ada0552e2462fe7c1 Signed-off-by: Nico Huber nico.h@gmx.de --- M common/hw-gfx-gma-config_helpers.adb M common/hw-gfx-gma-pipe_setup.adb 2 files changed, 17 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/97/26697/1
diff --git a/common/hw-gfx-gma-config_helpers.adb b/common/hw-gfx-gma-config_helpers.adb index 5e5be5d..4cf04c3 100644 --- a/common/hw-gfx-gma-config_helpers.adb +++ b/common/hw-gfx-gma-config_helpers.adb @@ -193,7 +193,7 @@ -- Only 32bpp RGB (ignored for VGA plane) -- Stride must be big enough and a multiple of 64 bytes or the tile size -- (ignored for VGA plane) - -- Tiling and rotation is only supported on newer generations (with + -- Y-Tiling and rotation are only supported on newer generations (with -- Plane_Control) -- 90 degree rotations are only supported with Y-tiling return @@ -206,7 +206,7 @@ (FB.Offset = VGA_PLANE_FRAMEBUFFER_OFFSET or (FB.BPC = 8 and Valid_Stride (FB) and (Config.Has_Plane_Control or - (FB.Tiling = Linear and FB.Rotation = No_Rotation)) and + (FB.Tiling /= Y_Tiled and FB.Rotation = No_Rotation)) and (FB.Tiling = Y_Tiled or not Rotation_90 (FB)))); end Validate_Config;
diff --git a/common/hw-gfx-gma-pipe_setup.adb b/common/hw-gfx-gma-pipe_setup.adb index 7bccb4d..7a53faa 100644 --- a/common/hw-gfx-gma-pipe_setup.adb +++ b/common/hw-gfx-gma-pipe_setup.adb @@ -27,14 +27,22 @@
DSPCNTR_ENABLE : constant := 1 * 2 ** 31; DSPCNTR_GAMMA_CORRECTION : constant := 1 * 2 ** 30; - DSPCNTR_DISABLE_TRICKLE_FEED : constant := 1 * 2 ** 14; DSPCNTR_FORMAT_MASK : constant := 15 * 2 ** 26; + DSPCNTR_DISABLE_TRICKLE_FEED : constant := 1 * 2 ** 14; + DSPCNTR_TILED_SURFACE_LINEAR : constant := 0 * 2 ** 10; + DSPCNTR_TILED_SURFACE_X_TILED : constant := 1 * 2 ** 10; + + DSPCNTR_TILED_SURFACE : constant array (Tiling_Type) of Word32 := + (Linear => DSPCNTR_TILED_SURFACE_LINEAR, + X_Tiled => DSPCNTR_TILED_SURFACE_X_TILED, + Y_Tiled => 0); -- unsupported
DSPCNTR_MASK : constant Word32 := DSPCNTR_ENABLE or DSPCNTR_GAMMA_CORRECTION or DSPCNTR_FORMAT_MASK or - DSPCNTR_DISABLE_TRICKLE_FEED; + DSPCNTR_DISABLE_TRICKLE_FEED or + DSPCNTR_TILED_SURFACE_X_TILED;
PLANE_CTL_PLANE_ENABLE : constant := 1 * 2 ** 31; PLANE_CTL_SRC_PIX_FMT_RGB_32B_8888 : constant := 4 * 2 ** 24; @@ -239,17 +247,20 @@ Registers.Unset_And_Set_Mask (Register => Controller.DSPCNTR, Mask_Unset => DSPCNTR_MASK, - Mask_Set => PRI); + Mask_Set => PRI or DSPCNTR_TILED_SURFACE (FB.Tiling));
Registers.Write (Controller.DSPSTRIDE, Word32 (Pixel_To_Bytes (FB.Stride, FB))); - if Config.Has_DSP_Linoff then + if Config.Has_DSP_Linoff and then FB.Tiling = Linear then Registers.Write (Register => Controller.DSPLINOFF, Value => Word32 (Pixel_To_Bytes (FB.Start_Y * FB.Stride + FB.Start_X, FB))); Registers.Write (Controller.DSPTILEOFF, 0); else + if Config.Has_DSP_Linoff then + Registers.Write (Controller.DSPLINOFF, 0); + end if; Registers.Write (Register => Controller.DSPTILEOFF, Value => Shift_Left (Word32 (FB.Start_Y), 16) or