New patch to review for coreboot: soc/apollolake: remove _RMV and _DSW methods from xhci.asl

[Hannah Williams]

Hannah Williams ([e-mail]) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14966

-gerrit

commit d4c6629419fb4c38a47a9d0f30992af95547ef36
Author: Hannah Williams 
Date:   Wed May 25 11:12:43 2016 -0700

soc/apollolake: remove _RMV and _DSW methods from xhci.asl

Change-Id: Ic314656f34fda10e58e55bdefeb0a1f0c6ab5ae2
    Signed-off-by: Hannah Williams 
---
 src/soc/intel/apollolake/acpi/xhci.asl | 19 +++++--------------
 1 file changed, 5 insertions(+), 14 deletions(-)

diff --git a/src/soc/intel/apollolake/acpi/xhci.asl b/src/soc/intel/apollolake/acpi/xhci.asl
index fc67074..8b40dfa 100644
--- a/src/soc/intel/apollolake/acpi/xhci.asl
+++ b/src/soc/intel/apollolake/acpi/xhci.asl
@@ -1,4 +1,5 @@
-/* This file is part of the coreboot project.
+/*
+ * This file is part of the coreboot project.
  *
  * Copyright (C) 2016 Intel Corporation.
  *
@@ -13,26 +14,16 @@
  */

/* XHCI Controller 0:15.0 */
-Device(XHC1) {
-	Name(_ADR, 0x00150000)  // Device 21, Function 0
+Device (XHC1) {
+	Name(_ADR, 0x00150000)  /* Device 21, Function 0 */

Name (_S3D, 3)  /* D3 supported in S3 */
    Name (_S0W, 3)  /* D3 can wake device in S0 */
    Name (_S3W, 3)  /* D3 can wake system from S3 */

-	// Declare XHCI GPE status and enable bits are bit 13
+	/* Declare XHCI GPE status and enable bits are bit 13 */
    Name (_PRW, Package() { GPE0A_XHCI_PME_STS, 3 })

-	Method (_DSW, 3, NotSerialized)  // _DSW: Device Sleep Wake
-	{
-		Return (Zero)
-	}
-
-	Method (_RMV, 0, NotSerialized)  // _RMV: Removal Status
-	{
-		Return (Zero)
-	}
-
    Method(_STA, 0)
    {
    	Return (0xF)