[M] Change in coreboot[main]: soc/intel/xeon_sp: Generate root port SSDT device objects

[Patrick Rudolph (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, Cliff Huang, Jincheng Li, Johnny Lin, Jonathan Zhang, Lance Zhao, Lean Sheng Tan, Shuo Liu, Tim Chu, Tim Wawrzynczak.

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81567?usp=email )

Change subject: soc/intel/xeon_sp: Generate root port SSDT device objects
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Patch Set 1:

(2 comments)

File src/acpi/acpigen_pci.c:

https://review.coreboot.org/c/coreboot/+/81567/comment/3ba48f8e_d3508f31 :
PS1, Line 368: is_pci_bridge
When it's a PCI bridge there should be a PCI driver for it, thus no need to have this separate method.


File src/soc/intel/xeon_sp/acpi.c:

https://review.coreboot.org/c/coreboot/+/81567/comment/1a5d481b_618b6dbd :
PS1, Line 176: ops
Use a pci driver to set ops and name



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