Change in coreboot[master]: nb/intel/haswell: Move MRC glue code into a subfolder

[Paul Fagerburg (Code Review)]

Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/55523 )

Change subject: nb/intel/haswell: Move MRC glue code into a subfolder
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nb/intel/haswell: Move MRC glue code into a subfolder

Put the Haswell MRC glue code inside a `haswell_mrc` subfolder. Future
commits will move the Broadwell MRC/refcode glue code to be in Haswell
northbridge scope, so plan in advance.

Tested on Asrock B85M Pro4, still boots.

Change-Id: Id3e26ec1c2d5ccce928083d7ce41445908df8cf3
Signed-off-by: Angel Pons 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55523
Reviewed-by: Felix Held 
Reviewed-by: Paul Menzel 
Tested-by: build bot (Jenkins) 
---
M src/northbridge/intel/haswell/Makefile.inc
A src/northbridge/intel/haswell/haswell_mrc/Makefile.inc
R src/northbridge/intel/haswell/haswell_mrc/pei_data.h
R src/northbridge/intel/haswell/haswell_mrc/raminit.c
4 files changed, 13 insertions(+), 9 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Felix Held: Looks good to me, approved

diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc
index f718f9a..2d1532b 100644
--- a/src/northbridge/intel/haswell/Makefile.inc
+++ b/src/northbridge/intel/haswell/Makefile.inc
@@ -13,17 +13,12 @@
 ramstage-y += minihd.c

romstage-y += memmap.c
-romstage-y += raminit.c
 romstage-y += romstage.c
 romstage-y += early_init.c
 romstage-y += report_platform.c

-# We don't ship that, but booting without it is bound to fail
-cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin
-mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE))
-mrc.bin-position := 0xfffa0000
-mrc.bin-type := mrc
-
 postcar-y += memmap.c

+subdirs-y += haswell_mrc
+
 endif
diff --git a/src/northbridge/intel/haswell/haswell_mrc/Makefile.inc b/src/northbridge/intel/haswell/haswell_mrc/Makefile.inc
new file mode 100644
index 0000000..bd6314c
--- /dev/null
+++ b/src/northbridge/intel/haswell/haswell_mrc/Makefile.inc
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+romstage-y += raminit.c
+
+# We don't ship that, but booting without it is bound to fail
+cbfs-files-$(CONFIG_HAVE_MRC) += mrc.bin
+mrc.bin-file := $(call strip_quotes,$(CONFIG_MRC_FILE))
+mrc.bin-position := 0xfffa0000
+mrc.bin-type := mrc
diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/haswell_mrc/pei_data.h
similarity index 100%
rename from src/northbridge/intel/haswell/pei_data.h
rename to src/northbridge/intel/haswell/haswell_mrc/pei_data.h
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/haswell_mrc/raminit.c
similarity index 98%
rename from src/northbridge/intel/haswell/raminit.c
rename to src/northbridge/intel/haswell/haswell_mrc/raminit.c
index 4537783..338b4d0 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/haswell_mrc/raminit.c
@@ -14,6 +14,8 @@
 #include <device/pci_ops.h>
 #include <device/dram/ddr3.h>
 #include <northbridge/intel/haswell/chip.h>
+#include <northbridge/intel/haswell/haswell.h>
+#include <northbridge/intel/haswell/raminit.h>
 #include <smbios.h>
 #include <spd.h>
 #include <security/vboot/vboot_common.h>
@@ -23,9 +25,7 @@
 #include <timestamp.h>
 #include <types.h>

-#include "raminit.h"
 #include "pei_data.h"
-#include "haswell.h"

#define MRC_CACHE_VERSION 1