Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31157
Change subject: hatch: Enable S0ix ......................................................................
hatch: Enable S0ix
BUG=b:123540469 BRANCH=None TEST=None
Change-Id: I713e6ad70efdd152895afa45aee44a5b53a8136b Signed-off-by: Shelley Chen shchen@google.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/31157/1
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index cea64e4..2bc4f78 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -55,6 +55,8 @@ register "HeciEnabled" = "1" # Enable Speed Shift Technology support register "speed_shift_enable" = "1" + # Enable S0ix + register "s0ix_enable" = "1"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 0 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 1
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31157 )
Change subject: hatch: Enable S0ix ......................................................................
Patch Set 1: Code-Review+1
Rizwan Qureshi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31157 )
Change subject: hatch: Enable S0ix ......................................................................
Patch Set 1: Code-Review+2
Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31157 )
Change subject: hatch: Enable S0ix ......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/#/c/31157/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/#/c/31157/1//COMMIT_MSG@7 PS1, Line 7: hatch: Enable S0ix Please use *google/hatch:* as prefix.
https://review.coreboot.org/#/c/31157/1//COMMIT_MSG@11 PS1, Line 11: TEST=None Would be nice if you could test it.
Hello Aaron Durbin, Rajat Jain, Aamir Bohra, Rizwan Qureshi, Duncan Laurie, build bot (Jenkins), Furquan Shaikh,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/31157
to look at the new patch set (#2).
Change subject: mb/google/hatch: Enable S0ix ......................................................................
mb/google/hatch: Enable S0ix
BUG=b:123540469 BRANCH=None TEST=None
Change-Id: I713e6ad70efdd152895afa45aee44a5b53a8136b Signed-off-by: Shelley Chen shchen@google.com --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/31157/2
Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31157 )
Change subject: mb/google/hatch: Enable S0ix ......................................................................
Patch Set 2: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31157 )
Change subject: mb/google/hatch: Enable S0ix ......................................................................
Patch Set 2: Code-Review+2
Shelley Chen has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/31157 )
Change subject: mb/google/hatch: Enable S0ix ......................................................................
mb/google/hatch: Enable S0ix
BUG=b:123540469 BRANCH=None TEST=None
Change-Id: I713e6ad70efdd152895afa45aee44a5b53a8136b Signed-off-by: Shelley Chen shchen@google.com Reviewed-on: https://review.coreboot.org/c/31157 Reviewed-by: Duncan Laurie dlaurie@chromium.org Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Aamir Bohra aamir.bohra@intel.com Reviewed-by: Rizwan Qureshi rizwan.qureshi@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/hatch/variants/baseboard/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Duncan Laurie: Looks good to me, approved Furquan Shaikh: Looks good to me, approved Rizwan Qureshi: Looks good to me, approved Aamir Bohra: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index cea64e4..2bc4f78 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -55,6 +55,8 @@ register "HeciEnabled" = "1" # Enable Speed Shift Technology support register "speed_shift_enable" = "1" + # Enable S0ix + register "s0ix_enable" = "1"
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 0 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 1
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Aamir Bohra (Code Review) -
Duncan Laurie (Code Review)
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Furquan Shaikh (Code Review)
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Paul Menzel (Code Review)
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Rizwan Qureshi (Code Review)
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Shelley Chen (Code Review)