New patch to review for coreboot: 854a36a lenovo: Remove duplicate devicetree.cb eventc entry.
Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7677
-gerrit
commit 854a36a1c66d1fc508738f80a62814a52e868641 Author: Vladimir Serbinenko phcoder@gmail.com Date: Sat Dec 6 21:44:30 2014 +0100
lenovo: Remove duplicate devicetree.cb eventc entry.
Keep only the last one: it was the one which was really used.
Change-Id: I19132f6224d6847e615e3c582aaa6e66b0d56c7a Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/mainboard/lenovo/t60/devicetree.cb | 3 +-- src/mainboard/lenovo/x201/devicetree.cb | 1 - src/mainboard/lenovo/x60/devicetree.cb | 1 - 3 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb index 643cc7c..bca0787 100644 --- a/src/mainboard/lenovo/t60/devicetree.cb +++ b/src/mainboard/lenovo/t60/devicetree.cb @@ -143,9 +143,8 @@ chip northbridge/intel/i945 register "event9_enable" = "0xff" register "eventa_enable" = "0xff" register "eventb_enable" = "0xff" - register "eventc_enable" = "0xff" - register "eventd_enable" = "0xff" register "eventc_enable" = "0x3c" + register "eventd_enable" = "0xff"
end chip superio/nsc/pc87382 diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb index 117c25c..ffd3add 100644 --- a/src/mainboard/lenovo/x201/devicetree.cb +++ b/src/mainboard/lenovo/x201/devicetree.cb @@ -70,7 +70,6 @@ chip northbridge/intel/nehalem register "event5_enable" = "0x3c" register "event6_enable" = "0x80" register "event7_enable" = "0x01" - register "eventc_enable" = "0x3c" register "event8_enable" = "0x01" register "event9_enable" = "0xff" register "eventa_enable" = "0xff" diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb index 91c9d73..382ebaf 100644 --- a/src/mainboard/lenovo/x60/devicetree.cb +++ b/src/mainboard/lenovo/x60/devicetree.cb @@ -124,7 +124,6 @@ chip northbridge/intel/i945 register "event5_enable" = "0x3c" register "event6_enable" = "0x80" register "event7_enable" = "0x01" - register "eventc_enable" = "0x3c" register "event8_enable" = "0x01" register "event9_enable" = "0xff" register "eventa_enable" = "0xff"
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Vladimir Serbinenko