Change in coreboot[master]: soc/intel/cannonlake: Update UPD from device switch

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27766 )

Change subject: soc/intel/cannonlake: Update UPD from device switch
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Patch Set 3:

(5 comments)

https://review.coreboot.org/#/c/27766/3/src/soc/intel/cannonlake/chip.c
File src/soc/intel/cannonlake/chip.c:

https://review.coreboot.org/#/c/27766/3/src/soc/intel/cannonlake/chip.c@253
PS3, Line 253: 		params->Usb2AfePredeemp[i] = config->usb2_ports[i].tx_emp_enable;
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https://review.coreboot.org/#/c/27766/3/src/soc/intel/cannonlake/chip.c@262
PS3, Line 262: 			params->Usb3HsioTxDeEmph[i] = config->usb3_ports[i].tx_de_emp;
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https://review.coreboot.org/#/c/27766/3/src/soc/intel/cannonlake/chip.c@266
PS3, Line 266: 			params->Usb3HsioTxDownscaleAmp[i] = config->usb3_ports[i].tx_downscale_amp;
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https://review.coreboot.org/#/c/27766/3/src/soc/intel/cannonlake/chip.c@295
PS3, Line 295: 			params->PchScsEmmcHs400RxStrobeDll1 = config->EmmcHs400RxStrobeDll1;
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https://review.coreboot.org/#/c/27766/3/src/soc/intel/cannonlake/chip.c@296
PS3, Line 296: 			params->PchScsEmmcHs400TxDataDll = config->EmmcHs400TxDataDll;
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