Change in ...coreboot[master]: mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT

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Naveen M (Code Review)

26 Apr 2019 26 Apr '19

6:02 p.m.

Naveen M has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32474

Change subject: mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT ......................................................................

mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT

Patch corrects IRQ and GPIO configuration for RT5682 codec's Jack INT

BUG=b:130180492 TEST=build and boot on a CML EVT board. Use evtest & verify headset jack detection functions as expected.

Change-Id: Ia9bf8d554b54554f9ac1e78fd44a508964c8a14d Signed-off-by: Naveen Manohar naveen.m@intel.com --- M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/hatch/overridetree.cb M src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb 3 files changed, 5 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/32474/1

diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index 7e82b9b..e5a4fa2 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -349,7 +349,7 @@ * TODO Configure it back to invert mode, when * ITSS IPCx configuration is fixed in FSP. */ - PAD_CFG_GPI_APIC(GPP_H0, NONE, PLTRST, LEVEL, NONE), + PAD_CFG_GPI_APIC(GPP_H0, NONE, PLTRST, EDGE_BOTH, INVERT), /* H1 : CNV_RF_RESET_L */ PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3), /* H2 : CNV_CLKREQ0 */ diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb index 22a0947..cd08267 100644 --- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb @@ -129,7 +129,8 @@ register "hid" = ""10EC5682"" register "name" = ""RT58"" register "desc" = ""Realtek RT5682"" - register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H0_IRQ)" + register "irq" = "ACPI_IRQ_EDGE_HIGH(GPP_H0_IRQ)" + register "probed" = "1" register "property_count" = "1" # Set the jd_src to RT5668_JD1 for jack detection register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" diff --git a/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb b/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb index 5bcb67e..a901009 100644 --- a/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb @@ -114,7 +114,8 @@ register "hid" = ""10EC5682"" register "name" = ""RT58"" register "desc" = ""Realtek RT5682"" - register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H0_IRQ)" + register "irq" = "ACPI_IRQ_EDGE_HIGH(GPP_H0_IRQ)" + register "probed" = "1" register "property_count" = "1" # Set the jd_src to RT5668_JD1 for jack detection register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"

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Naveen M (Code Review)

29 Apr 29 Apr

5:24 a.m.

Hello build bot (Jenkins), Furquan Shaikh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32474

to look at the new patch set (#2).

Change subject: mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT ......................................................................

mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT

Patch corrects IRQ and GPIO configuration for RT5682 codec's Jack INT

BUG=b:130180492 TEST=build and boot on a CML EVT board. Use evtest & verify headset jack detection functions as expected.

Change-Id: Ia9bf8d554b54554f9ac1e78fd44a508964c8a14d Signed-off-by: Naveen Manohar naveen.m@intel.com Suggested-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/hatch/overridetree.cb M src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb 3 files changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/32474/2

Furquan Shaikh (Code Review)

5:35 a.m.

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32474 )

Change subject: mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT ......................................................................

Patch Set 2:

(2 comments)

https://review.coreboot.org/#/c/32474/2//COMMIT_MSG Commit Message:

https://review.coreboot.org/#/c/32474/2//COMMIT_MSG@9 PS2, Line 9: Patch corrects IRQ and GPIO configuration for RT5682 codec's Jack INT It would be good to add some context saying why it was changed from IOAPIC to GPIO INT.

https://review.coreboot.org/#/c/32474/2/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/baseboard/gpio.c:

https://review.coreboot.org/#/c/32474/2/src/mainboard/google/hatch/variants/... PS2, Line 349: TODO Configure it back to invert mode, when : * ITSS IPCx configuration is fixed in FSP. Can get rid of this comment now. It no longer holds.

Naveen M (Code Review)

5:49 a.m.

Hello build bot (Jenkins), Furquan Shaikh,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32474

to look at the new patch set (#3).

Change subject: mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT ......................................................................

mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT

Patch corrects IRQ and GPIO configuration for RT5682 codec's Jack INT. Switching IOAPIC to GpioInt Interrupt() as ACPI doesn't support jack triggering on both edges.

BUG=b:130180492 TEST=build and boot on a CML EVT board. Use evtest & verify headset jack detection functions as expected.

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/32474/3

Naveen M (Code Review)

5:53 a.m.

Naveen M has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32474 )

Change subject: mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT ......................................................................

Patch Set 3:

(2 comments)

Thanks

https://review.coreboot.org/#/c/32474/2//COMMIT_MSG Commit Message:

https://review.coreboot.org/#/c/32474/2//COMMIT_MSG@9 PS2, Line 9: Patch corrects IRQ and GPIO configuration for RT5682 codec's Jack INT

...

It would be good to add some context saying why it was changed from IOAPIC to GPIO INT.

Done

https://review.coreboot.org/#/c/32474/2/src/mainboard/google/hatch/variants/... File src/mainboard/google/hatch/variants/baseboard/gpio.c:

https://review.coreboot.org/#/c/32474/2/src/mainboard/google/hatch/variants/... PS2, Line 349: TODO Configure it back to invert mode, when : * ITSS IPCx configuration is fixed in FSP.

...

Can get rid of this comment now. It no longer holds.

Ack

-- To view, visit https://review.coreboot.org/c/coreboot/+/32474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9bf8d554b54554f9ac1e78fd44a508964c8a14d Gerrit-Change-Number: 32474 Gerrit-PatchSet: 3 Gerrit-Owner: Naveen M naveen.m@intel.com Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Naveen M naveen.m@intel.com Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Naveen M naveen.m@intel.corp-partner.google.com Gerrit-Comment-Date: Mon, 29 Apr 2019 03:53:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh furquan@google.com Gerrit-MessageType: comment

Furquan Shaikh (Code Review)

7 p.m.

Furquan Shaikh has uploaded a new patch set (#4) to the change originally created by Naveen M. ( https://review.coreboot.org/c/coreboot/+/32474 )

Change subject: mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT ......................................................................

mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT

Patch corrects IRQ and GPIO configuration for RT5682 codec's Jack INT. Switching IOAPIC to GpioInt because ACPI Interrupt() doesn't support jack triggering on both edges.

BUG=b:130180492 TEST=build and boot on a CML EVT board. Use evtest & verify headset jack detection functions as expected.

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/32474/4

-- To view, visit https://review.coreboot.org/c/coreboot/+/32474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9bf8d554b54554f9ac1e78fd44a508964c8a14d Gerrit-Change-Number: 32474 Gerrit-PatchSet: 4 Gerrit-Owner: Naveen M naveen.m@intel.com Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Naveen M naveen.m@intel.com Gerrit-Reviewer: Paul Fagerburg pfagerburg@chromium.org Gerrit-Reviewer: Shelley Chen shchen@google.com Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Naveen M naveen.m@intel.corp-partner.google.com Gerrit-MessageType: newpatchset

Furquan Shaikh (Code Review)

7:01 p.m.

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32474 )

Change subject: mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT ......................................................................

Patch Set 4: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/32474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9bf8d554b54554f9ac1e78fd44a508964c8a14d Gerrit-Change-Number: 32474 Gerrit-PatchSet: 4 Gerrit-Owner: Naveen M naveen.m@intel.com Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Naveen M naveen.m@intel.com Gerrit-Reviewer: Paul Fagerburg pfagerburg@chromium.org Gerrit-Reviewer: Shelley Chen shchen@google.com Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Naveen M naveen.m@intel.corp-partner.google.com Gerrit-Comment-Date: Mon, 29 Apr 2019 17:01:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Paul Fagerburg (Code Review)

7:07 p.m.

Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32474 )

Change subject: mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT ......................................................................

Patch Set 4: Code-Review+1

-- To view, visit https://review.coreboot.org/c/coreboot/+/32474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9bf8d554b54554f9ac1e78fd44a508964c8a14d Gerrit-Change-Number: 32474 Gerrit-PatchSet: 4 Gerrit-Owner: Naveen M naveen.m@intel.com Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Naveen M naveen.m@intel.com Gerrit-Reviewer: Paul Fagerburg pfagerburg@chromium.org Gerrit-Reviewer: Shelley Chen shchen@google.com Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Naveen M naveen.m@intel.corp-partner.google.com Gerrit-Comment-Date: Mon, 29 Apr 2019 17:07:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Tim Wawrzynczak (Code Review)

7:24 p.m.

Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32474 )

Change subject: mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT ......................................................................

Patch Set 4: Code-Review+1

-- To view, visit https://review.coreboot.org/c/coreboot/+/32474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9bf8d554b54554f9ac1e78fd44a508964c8a14d Gerrit-Change-Number: 32474 Gerrit-PatchSet: 4 Gerrit-Owner: Naveen M naveen.m@intel.com Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Naveen M naveen.m@intel.com Gerrit-Reviewer: Paul Fagerburg pfagerburg@chromium.org Gerrit-Reviewer: Shelley Chen shchen@google.com Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Naveen M naveen.m@intel.corp-partner.google.com Gerrit-Comment-Date: Mon, 29 Apr 2019 17:24:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Shelley Chen (Code Review)

30 Apr 30 Apr

10:30 p.m.

Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32474 )

Change subject: mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT ......................................................................

Patch Set 4: Code-Review+2

-- To view, visit https://review.coreboot.org/c/coreboot/+/32474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9bf8d554b54554f9ac1e78fd44a508964c8a14d Gerrit-Change-Number: 32474 Gerrit-PatchSet: 4 Gerrit-Owner: Naveen M naveen.m@intel.com Gerrit-Reviewer: Duncan Laurie dlaurie@chromium.org Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Naveen M naveen.m@intel.com Gerrit-Reviewer: Paul Fagerburg pfagerburg@chromium.org Gerrit-Reviewer: Shelley Chen shchen@google.com Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Naveen M naveen.m@intel.corp-partner.google.com Gerrit-Comment-Date: Tue, 30 Apr 2019 20:30:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

Furquan Shaikh (Code Review)

10:36 p.m.

Furquan Shaikh has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32474 )

Change subject: mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT ......................................................................

mb/google/hatch: Modify IRQ configuration to enable RT5682 headset INT

Patch corrects IRQ and GPIO configuration for RT5682 codec's Jack INT. Switching IOAPIC to GpioInt because ACPI Interrupt() doesn't support jack triggering on both edges.

BUG=b:130180492 TEST=build and boot on a CML EVT board. Use evtest & verify headset jack detection functions as expected.

Change-Id: Ia9bf8d554b54554f9ac1e78fd44a508964c8a14d Signed-off-by: Naveen Manohar naveen.m@intel.com Suggested-by: Furquan Shaikh furquan@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/32474 Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Paul Fagerburg pfagerburg@chromium.org Reviewed-by: Tim Wawrzynczak twawrzynczak@chromium.org Reviewed-by: Shelley Chen shchen@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/hatch/variants/baseboard/gpio.c M src/mainboard/google/hatch/variants/hatch/overridetree.cb M src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb 3 files changed, 3 insertions(+), 5 deletions(-)

Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Shelley Chen: Looks good to me, approved Tim Wawrzynczak: Looks good to me, but someone else must approve Paul Fagerburg: Looks good to me, but someone else must approve

diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index c12aa64..198d930 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -346,10 +346,8 @@ PAD_NC(GPP_G7, DN_20K), /* * H0 : HP_INT_L - * TODO Configure it back to invert mode, when - * ITSS IPCx configuration is fixed in FSP. */ - PAD_CFG_GPI_APIC(GPP_H0, NONE, PLTRST, LEVEL, NONE), + PAD_CFG_GPI_INT(GPP_H0, NONE, PLTRST, LEVEL), /* H1 : CNV_RF_RESET_L */ PAD_CFG_NF(GPP_H1, NONE, DEEP, NF3), /* H2 : CNV_CLKREQ0 */ diff --git a/src/mainboard/google/hatch/variants/hatch/overridetree.cb b/src/mainboard/google/hatch/variants/hatch/overridetree.cb index 13e7766..4b1b8d8 100644 --- a/src/mainboard/google/hatch/variants/hatch/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch/overridetree.cb @@ -132,7 +132,7 @@ register "hid" = ""10EC5682"" register "name" = ""RT58"" register "desc" = ""Realtek RT5682"" - register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H0_IRQ)" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_H0)" register "property_count" = "1" # Set the jd_src to RT5668_JD1 for jack detection register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER" diff --git a/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb b/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb index 15b93f3..c5d5964 100644 --- a/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb +++ b/src/mainboard/google/hatch/variants/hatch_whl/overridetree.cb @@ -117,7 +117,7 @@ register "hid" = ""10EC5682"" register "name" = ""RT58"" register "desc" = ""Realtek RT5682"" - register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_H0_IRQ)" + register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_H0)" register "property_count" = "1" # Set the jd_src to RT5668_JD1 for jack detection register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"

-- To view, visit https://review.coreboot.org/c/coreboot/+/32474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia9bf8d554b54554f9ac1e78fd44a508964c8a14d Gerrit-Change-Number: 32474 Gerrit-PatchSet: 5 Gerrit-Owner: Naveen M naveen.m@intel.com Gerrit-Reviewer: Duncan Laurie dlaurie@chromium.org Gerrit-Reviewer: Furquan Shaikh furquan@google.com Gerrit-Reviewer: Naveen M naveen.m@intel.com Gerrit-Reviewer: Paul Fagerburg pfagerburg@chromium.org Gerrit-Reviewer: Shelley Chen shchen@google.com Gerrit-Reviewer: Tim Wawrzynczak twawrzynczak@chromium.org Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org Gerrit-CC: Naveen M naveen.m@intel.corp-partner.google.com Gerrit-MessageType: merged

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Furquan Shaikh (Code Review)
Naveen M (Code Review)
Paul Fagerburg (Code Review)
Shelley Chen (Code Review)
Tim Wawrzynczak (Code Review)