Change in coreboot[master]: soc/intel/common: Allow RX level/edge configuartion for IOAPIC IRQ mode

[Aamir Bohra (Code Review)]

Hello Subrata Banik, Rizwan Qureshi, Hannah Williams, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/26730

to look at the new patch set (#4).

Change subject: soc/intel/common: Allow RX level/edge configuartion for IOAPIC IRQ mode
......................................................................

soc/intel/common: Allow RX level/edge configuartion for IOAPIC IRQ mode

GPIO configuration in IOAPIC mode is not limited to only
LEVEL trigger mode. This implementation allows level/edge/
either/none trigger configuration to be set for a GPIO in
IOAPIC mode with RX Invert configuration.

This patch also updates the corresponding references in mainboard
code.

Change-Id: I4e1f009489f2d8338ae94b78d7e9eb3f88a85daa
Signed-off-by: Aamir Bohra 
---
M src/mainboard/google/octopus/variants/baseboard/gpio.c
M src/mainboard/google/octopus/variants/bip/gpio.c
M src/mainboard/google/reef/variants/baseboard/gpio.c
M src/mainboard/google/reef/variants/coral/gpio.c
M src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c
M src/mainboard/intel/glkrvp/variants/baseboard/gpio.c
M src/soc/intel/common/block/include/intelblocks/gpio_defs.h
7 files changed, 31 insertions(+), 29 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/26730/4