Attention is currently required from: Zheng Bao.
Hello Zheng Bao,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/84580?usp=email
to review the following change.
Change subject: amdfwtool: Set alignment of FWs in BIOS table as 0x1000 ......................................................................
amdfwtool: Set alignment of FWs in BIOS table as 0x1000
For A/B recovery, the FWs should be align with SPI sector size. So they can be erased and updated independently.
Change-Id: I7f36acbf42afdc7a9bdd0f25d2352c731496dc4d Signed-off-by: Zheng Bao fishbaozi@gmail.com --- M util/amdfwtool/amdfwtool.c 1 file changed, 3 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/84580/1
diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index ce164bc..e76f41d 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -1509,7 +1509,7 @@ SET_ADDR_MODE_BY_TABLE(biosdir); memset(BUFF_CURRENT(*ctx), 0xff, biosdir->entries[count].size); - adjust_current_pointer(ctx, biosdir->entries[count].size, 0x100U); + adjust_current_pointer(ctx, biosdir->entries[count].size, TABLE_ALIGNMENT); break; case AMD_BIOS_APOB: biosdir->entries[count].size = fw_table[i].size; @@ -1576,7 +1576,7 @@ biosdir->entries[count].address_mode = SET_ADDR_MODE(biosdir, AMD_ADDR_REL_TAB);
- adjust_current_pointer(ctx, bytes, 0x100U); + adjust_current_pointer(ctx, bytes, TABLE_ALIGNMENT); break; case AMD_BIOS_PSP_SHARED_MEM: biosdir->entries[count].dest = fw_table[i].dest; @@ -1604,7 +1604,7 @@ ctx->biosdir2_b == NULL) *(uint8_t *)BUFF_CURRENT(*ctx) = 0xFF;
- adjust_current_pointer(ctx, bytes, 0x100U); + adjust_current_pointer(ctx, bytes, TABLE_ALIGNMENT); if (fw_table[i].type == AMD_BIOS_APCB && !cb_config->have_apcb_bk) { size = biosdir->entries[count].size; source = biosdir->entries[count].source;