[S] Change in coreboot[main]: soc/intel/alderlake: Hook up PCIe Power Management to option API

[Sean Rhodes (Code Review)]

Attention is currently required from: Angel Pons, Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik.

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/81906?usp=email )

Change subject: soc/intel/alderlake: Hook up PCIe Power Management to option API
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Patch Set 10:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/81906/comment/7c502b97_089ad383?usp... :
PS10, Line 10: option API.
> Ideally, you would want to have per-port options. […]

For us, at least, people wanted it as a "make sure no power saving stuff is making me lose 0.00001% performance", so the "all" option is actually what we're after.

Maybe when CFR gets merged, generating them automatically with an "all" option would be the solution?