New patch to review for coreboot: badb325 google/snow: Add "wakup" module for suspend/resume.
Hung-Te Lin (hungte@chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3129
-gerrit
commit badb325241ac84b6711fb82565191378658efffc Author: Hung-Te Lin hungte@chromium.org Date: Thu Apr 25 17:38:55 2013 +0800
google/snow: Add "wakup" module for suspend/resume.
The "wakeup" procedure will be shared by bootblock and romstage for different types of resume process.
Note, this commit does not include changes in romstage/bootblock to enable suspend/resume feature. Simply adding functions to handle suspend/resume.
Verified by successfully built and boot Google/Snow firmware image.
Change-Id: I17a256afb99f2f8b5e0eac3393cdf6959b239341 Signed-off-by: Hung-Te Lin hungte@chromium.org --- src/cpu/samsung/exynos5250/Makefile.inc | 2 +- src/mainboard/google/snow/Makefile.inc | 3 ++ src/mainboard/google/snow/mainboard.h | 9 +++++ src/mainboard/google/snow/romstage.c | 13 ------- src/mainboard/google/snow/wakeup.c | 60 +++++++++++++++++++++++++++++++++ 5 files changed, 73 insertions(+), 14 deletions(-)
diff --git a/src/cpu/samsung/exynos5250/Makefile.inc b/src/cpu/samsung/exynos5250/Makefile.inc index 8788a6c..25d1bc5 100644 --- a/src/cpu/samsung/exynos5250/Makefile.inc +++ b/src/cpu/samsung/exynos5250/Makefile.inc @@ -3,7 +3,7 @@ # image outside of CBFS #INTERMEDIATE += exynos5250_add_bl1
-bootblock-y += pinmux.c mct.c +bootblock-y += pinmux.c mct.c power.c # Clock is required for UART bootblock-$(CONFIG_EARLY_CONSOLE) += clock_init.c bootblock-$(CONFIG_EARLY_CONSOLE) += clock.c diff --git a/src/mainboard/google/snow/Makefile.inc b/src/mainboard/google/snow/Makefile.inc index 46e366f..84a8c05 100644 --- a/src/mainboard/google/snow/Makefile.inc +++ b/src/mainboard/google/snow/Makefile.inc @@ -17,9 +17,12 @@ ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ##
+bootblock-y += wakeup.c + romstage-y += mainboard.c romstage-y += memory.c romstage-y += romstage.c +romstage-y += wakeup.c
# ramstage-y += ec.c ramstage-y += ramstage.c diff --git a/src/mainboard/google/snow/mainboard.h b/src/mainboard/google/snow/mainboard.h index 6fe371f..9650bea 100644 --- a/src/mainboard/google/snow/mainboard.h +++ b/src/mainboard/google/snow/mainboard.h @@ -35,4 +35,13 @@ enum snow_board_config {
int board_get_config(void);
+enum { + BOARD_IS_NOT_WAKEUP, + BOARD_WAKEUP_DIRECT, + BOARD_WAKEUP_NEED_CLOCK_RESET, +}; + +int board_get_wakeup_state(void); +void board_wakeup(void); + #endif /* MAINBOARD_H */ diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c index edbe009..6e312fa 100644 --- a/src/mainboard/google/snow/romstage.c +++ b/src/mainboard/google/snow/romstage.c @@ -46,19 +46,6 @@ #define PMIC_BUS 0 #define MMC0_GPIO_PIN (58)
-#if 0 -static int board_wakeup_permitted(void) -{ - const int gpio = GPIO_Y10; - int is_bad_wake; - - /* We're a bad wakeup if the gpio was defined and was high */ - is_bad_wake = ((gpio != -1) && gpio_get_value(gpio)); - - return !is_bad_wake; -} -#endif - static int setup_pmic(void) { int error = 0; diff --git a/src/mainboard/google/snow/wakeup.c b/src/mainboard/google/snow/wakeup.c new file mode 100644 index 0000000..49867af --- /dev/null +++ b/src/mainboard/google/snow/wakeup.c @@ -0,0 +1,60 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include <arch/gpio.h> +#include <arch/hlt.h> +#include <cpu/samsung/exynos5250/gpio.h> +#include <cpu/samsung/exynos5250/power.h> +#include <cpu/samsung/exynos5-common/exynos5-common.h> + +#include "mainboard.h" + +static int wakeup_need_reset(void) +{ + /* We're a bad wakeup if the gpio is high */ + return gpio_get_value(GPIO_Y10); +} + +void board_wakeup(void) +{ + if (wakeup_need_reset()) + power_reset(); + + power_init(); /* Ensure ps_hold_setup() for early wakeup. */ + power_exit_wakeup(); + /* Should never return. */ + hlt(); +} + +int board_get_wakeup_state() +{ + uint32_t status = power_read_reset_status(); + + /* DIDLE/LPA can be resumed without clock reset (ex, bootblock), + * and SLEEP requires resetting clock (should be done in ROM stage). + */ + + if (status == S5P_CHECK_DIDLE || status == S5P_CHECK_LPA) + return BOARD_WAKEUP_DIRECT; + + if (status == S5P_CHECK_SLEEP) + return BOARD_WAKEUP_NEED_CLOCK_RESET; + + return BOARD_IS_NOT_WAKEUP; +}
-
Hung-Te Lin